tangxifan b182b47d0b [test] use a timing-focus tool path for a testcase		2023-12-12 13:28:35 -08:00
..
basic_reg_test.sh	[test] use a timing-focus tool path for a testcase	2023-12-12 13:28:35 -08:00
basic_reg_yosys_only_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
fpga_bitstream_reg_test.sh	[test] add new tests to cover the new features	2023-10-06 18:41:57 -07:00
fpga_sdc_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
fpga_spice_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
fpga_verilog_reg_test.sh	[test] add new testcase	2023-11-13 14:11:34 -08:00
iwls_benchmark_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
micro_benchmark_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
quicklogic_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
tcl_reg_test.sh	[script] enable eval mode in tcl reg test	2022-12-02 12:07:27 -08:00
vtr_benchmark_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00