OpenFPGA/.github/workflows
tangxifan 78313b3593 [Misc] Now version number is in a separated file; Cmakefile and doc read the file and build version number on fly; CI can also update version 2022-05-22 15:22:43 +08:00
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build.yml build.yml flow is updated with basic_reg_yosys_only_test 2022-01-14 15:45:22 +05:00
cell_lib_test.yml [ci] downgrade ubuntu version in runner due to renamed packages in scripts 2022-05-09 18:00:33 +08:00
docker.yml [Bugfix] docker CI build 2021-10-20 14:50:17 -06:00
install_dependencies_build.sh [FPGA-Verilog] Now port/wire names uses "__" to avoid collision with FPGA global ports 2022-03-16 20:51:37 +08:00
install_dependencies_run.sh Updated dependencies 2022-05-15 20:53:07 -06:00
install_dependency_old.sh Fix dependency script reference in old build 2021-01-25 11:58:35 -07:00
labeler.yml Add docker build workflow and fix submodule issues. 2020-12-22 17:37:14 -07:00
patch_updater.yml [Misc] Now version number is in a separated file; Cmakefile and doc read the file and build version number on fly; CI can also update version 2022-05-22 15:22:43 +08:00