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OpenFPGA/openfpga_flow/benchmarks/quicklogic_tests/counter_16bit
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Lalit Sharma d4c5a5655a Removing blif file as well as and2 testcase 2021-02-19 08:55:17 -08:00
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rtl Adding quicklogic tests and updating the corresponding conf file to run them 2021-02-16 23:08:38 -08:00