tangxifan 96f36a96dd [core] syntax		2023-09-25 16:50:30 -07:00
..
example	[lib] update tests and fixed some bugs	2023-09-15 17:38:51 -07:00
src	[lib] add module rename assistant	2023-09-22 18:16:01 -07:00
test	[core] syntax	2023-09-25 16:50:30 -07:00
CMakeLists.txt	[lib] rename lib to namemanager as a unified library to provide naming support on FPGA modules	2023-09-15 13:51:14 -07:00