14 lines
480 B
SourcePawn
14 lines
480 B
SourcePawn
*****************************
|
|
* FPGA SPICE Netlist *
|
|
* Description: Header file *
|
|
* Author: Xifan TANG *
|
|
* Organization: EPFL/IC/LSI *
|
|
* Date: Thu Nov 15 14:26:08 2018
|
|
*
|
|
*****************************
|
|
.include './spice_test_example_2/subckt/grid_1_2.sp'
|
|
.include './spice_test_example_2/subckt/grid_1_0.sp'
|
|
.include './spice_test_example_2/subckt/grid_2_1.sp'
|
|
.include './spice_test_example_2/subckt/grid_0_1.sp'
|
|
.include './spice_test_example_2/subckt/grid_1_1.sp'
|