OpenFPGA/openfpga_flow/tasks/fpga_verilog/dsp
tangxifan 49fa783914 [script] now suggest to skip pb_pin_fixup step in example scripts for most test cases 2022-09-29 10:45:27 -07:00
..
multi_mode_mult_16x16/config [script] now suggest to skip pb_pin_fixup step in example scripts for most test cases 2022-09-29 10:45:27 -07:00
single_mode_mult_8x8/config [script] now suggest to skip pb_pin_fixup step in example scripts for most test cases 2022-09-29 10:45:27 -07:00
single_mode_mult_8x8_reg/config Moved 'verific_*' and 'yosys_*' config options from 'OpenFPGA_SHELL' to 'Synthesis Parameter' sections. 2022-01-21 02:21:00 +05:00
wide_multi_mode_mult_16x16/config [script] now suggest to skip pb_pin_fixup step in example scripts for most test cases 2022-09-29 10:45:27 -07:00