OpenFPGA/openfpga_flow/openfpga_yosys_techlib/common/dpram_1K_bram.txt

19 lines
223 B
Plaintext

bram $__MY_DPRAM_128x8
init 0
abits 7
dbits 8
groups 2
ports 1 1
wrmode 1 0
enable 1 1
transp 0 0
clocks 1 1
clkpol 1 1
endbram
match $__MY_DPRAM_128x8
min efficiency 0
make_transp
endmatch