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README.md
update openfpga architecture README for power-gating
2020-07-22 21:55:59 -06:00
k4_N4_40nm_bank_openfpga.xml
[Architecture] Update cell ports for native SRAM cell
2020-09-24 10:31:31 -06:00
k4_N4_40nm_bank_use_both_set_reset_openfpga.xml
[Architecture] Add architecture to use different SRAM cells for memory bank
2020-09-24 10:15:08 -06:00
k4_N4_40nm_bank_use_reset_openfpga.xml
[Architecture] Add architecture to use different SRAM cells for memory bank
2020-09-24 10:15:08 -06:00
k4_N4_40nm_bank_use_resetb_openfpga.xml
[Architecture] Add architecture to use different SRAM cells for memory bank
2020-09-24 10:15:08 -06:00
k4_N4_40nm_bank_use_set_openfpga.xml
[Architecture] Add architecture to use different SRAM cells for memory bank
2020-09-24 10:15:08 -06:00
k4_N4_40nm_bank_use_setb_openfpga.xml
[Architecture] Add architecture to use different SRAM cells for memory bank
2020-09-24 10:15:08 -06:00
k4_N4_40nm_cc_openfpga.xml
[Architecture] Add configuration chain architectures using different DFF cells
2020-09-24 14:23:27 -06:00
k4_N4_40nm_cc_use_both_set_reset_openfpga.xml
[Architecture] Bug fix in the configuration chain arch using both reset and set
2020-09-24 15:27:26 -06:00
k4_N4_40nm_cc_use_reset_openfpga.xml
[Architecture] Add configuration chain architectures using different DFF cells
2020-09-24 14:23:27 -06:00
k4_N4_40nm_cc_use_resetb_openfpga.xml
[Architecture] Add configuration chain architectures using different DFF cells
2020-09-24 14:23:27 -06:00
k4_N4_40nm_cc_use_set_openfpga.xml
[Architecture] Add configuration chain architectures using different DFF cells
2020-09-24 14:23:27 -06:00
k4_N4_40nm_cc_use_setb_openfpga.xml
[Architecture] Add configuration chain architectures using different DFF cells
2020-09-24 14:23:27 -06:00
k4_N4_40nm_fixed_sim_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k4_N4_40nm_frame_ccff_openfpga.xml
[Architecture] Bug fix due to switching CCFF cell
2020-09-24 16:45:56 -06:00
k4_N4_40nm_frame_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_N4_40nm_frame_scff_openfpga.xml
[Architecture] Add openfpga architecture where scan-chain ff is used in frame-based configuration protocol
2020-09-23 20:43:15 -06:00
k4_N4_40nm_frame_use_both_set_reset_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_N4_40nm_frame_use_reset_openfpga.xml
[Architecture] Add reset test case for frame based configuration
2020-09-24 12:17:18 -06:00
k4_N4_40nm_frame_use_resetb_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_N4_40nm_frame_use_set_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_N4_40nm_frame_use_setb_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_N4_40nm_powergate_frame_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_N4_40nm_standalone_openfpga.xml
[Architecture] Bug fix for vanilla memory organization
2020-09-24 14:13:48 -06:00
k4_N4_no_local_routing_40nm_frame_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_N5_pattern_local_routing_40nm_frame_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_frac_N4_40nm_cc_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k4_frac_N4_adder_chain_40nm_cc_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k4_frac_N4_adder_chain_mem1K_40nm_frame_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_frac_N4_adder_chain_mem1K_L124_40nm_frame_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k4_frac_N4_adder_chain_mem1K_frac_dsp32_40nm_frame_openfpga.xml
[Architecture] Update architecture files for new latch naming
2020-09-24 12:14:03 -06:00
k6_N10_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_N10_intermediate_buffer_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N8_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N8_debuf_mux_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N8_inbuf_only_mux_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N8_local_encoder_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N8_outbuf_only_mux_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N8_stdcell_mux_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N8_tree_mux_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_adder_chain_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_adder_chain_frac_mem32K_frac_dsp36_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_adder_chain_mem16K_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_adder_chain_mem16K_aib_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_adder_column_chain_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_adder_register_chain_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_adder_register_scan_chain_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_adder_register_scan_chain_depop50_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_adder_register_scan_chain_depop50_spypad_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_behavioral_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_local_encoder_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_spyio_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_stdcell_mux_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00
k6_frac_N10_tree_mux_40nm_openfpga.xml
[Architecture] Now all the configuration chain architecture use the DFFR cell by default
2020-09-24 15:19:37 -06:00