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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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a16dae6d8c
OpenFPGA
/
fpga_flow
/
benchmarks
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Verilog
/
MCNC
/
spla
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AurelienUoU
df8bb0db1a
Add MCNC Benchmarks netlists generation to travis regression test
2019-05-17 15:22:04 -06:00
..
spla.v
Add MCNC Benchmarks netlists generation to travis regression test
2019-05-17 15:22:04 -06:00