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OpenFPGA/openfpga
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tangxifan 9693a269ee [FPGA-Bitstream] Now dont' care bits are truelly seen in single-chain and flatten QuickLogic memory bank 2021-10-07 11:31:16 -07:00
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src [FPGA-Bitstream] Now dont' care bits are truelly seen in single-chain and flatten QuickLogic memory bank 2021-10-07 11:31:16 -07:00
CMakeLists.txt [Tool] Deploy pin constraints to preconfig Verilog module generation 2021-01-19 16:56:30 -07:00