OpenFPGA/yosys/techlibs/greenpak4/gp_dff.lib

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library(gp_dff) {
cell(GP_DFF) {
area: 1;
ff("IQ", "IQN") { clocked_on: CLK;
next_state: D; }
pin(CLK) { direction: input;
clock: true; }
pin(D) { direction: input; }
pin(Q) { direction: output;
function: "IQ"; }
}
cell(GP_DFFS) {
area: 1;
ff("IQ", "IQN") { clocked_on: CLK;
next_state: D;
preset: "nSET'"; }
pin(CLK) { direction: input;
clock: true; }
pin(D) { direction: input; }
pin(Q) { direction: output;
function: "IQ"; }
pin(nSET) { direction: input; }
}
cell(GP_DFFR) {
area: 1;
ff("IQ", "IQN") { clocked_on: CLK;
next_state: D;
clear: "nRST'"; }
pin(CLK) { direction: input;
clock: true; }
pin(D) { direction: input; }
pin(Q) { direction: output;
function: "IQ"; }
pin(nRST) { direction: input; }
}
}