tangxifan cfd035bf8f update tutorials about the verilog-to-verification		2020-08-17 14:33:51 -06:00
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arch_modeling	update tutorial about architecture to synchronize with latest file organization	2020-06-24 10:51:26 -06:00
design_flow	update tutorials about the verilog-to-verification	2020-08-17 14:33:51 -06:00
figures	merged tutorial to online documentation and reworked compilation guidelines	2020-03-09 13:58:24 -06:00
compile.rst	remove debug mode in compilation guidelines as we can use release in default now	2020-07-04 19:19:06 -06:00
eda_flow.rst	update documentation in simulation setting syntax	2020-03-09 17:40:33 -06:00
index.rst	add quick start tutorial for architecture modeling	2020-06-11 19:31:09 -06:00