tangxifan 462326aaa5 [Test] Update full testbench test case for flatten configuration protocol using 'write_full_testbench'		2021-06-07 21:50:00 -06:00
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custom_fabric_netlist_location/config	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
fabric_key	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
fixed_device_support/config	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
fixed_simulation_settings/config	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
full_testbench	[Test] Update full testbench test case for flatten configuration protocol using 'write_full_testbench'	2021-06-07 21:50:00 -06:00
generate_fabric	[Test] Update generate_fabric and generate_testbench test cases; Now generate_testbench tese case use the fabric netlist generated by the generate_fabric test case to run HDL verification	2021-04-11 17:26:27 -06:00
generate_testbench/config	[Test] Update generate_fabric and generate_testbench test cases; Now generate_testbench tese case use the fabric netlist generated by the generate_fabric test case to run HDL verification	2021-04-11 17:26:27 -06:00
global_tile_ports	[Test] Remove restrictions in the multi-clock test case and deploy new microbenchmarks for testing	2021-04-21 14:04:34 -06:00
k4_series	[Test] Add pin constraint file to map reset to correct FPGA pins	2021-04-17 15:04:26 -06:00
preconfig_testbench	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
tile_organization	[Test] Add test case for tileable I/O	2020-12-04 16:02:47 -07:00