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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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937ebd1b85
OpenFPGA
/
vpr7_x2p
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tangxifan
27b619554d
add stats for verilog modules
2019-08-23 20:23:42 -06:00
..
libarchfpga
add recursive global port searching for circuit library
2019-08-23 20:23:41 -06:00
libpcre
update travis configuration and clean up repository
2019-06-07 22:19:11 -06:00
libprinthandler
update travis configuration and clean up repository
2019-06-07 22:19:11 -06:00
vpr
add stats for verilog modules
2019-08-23 20:23:42 -06:00
CMakeLists.txt
Add latest abc and update ace dependence
2019-05-03 18:56:03 -06:00