82 lines
2.3 KiB
YAML
82 lines
2.3 KiB
YAML
L1_SB_MUX_DELAY: 1.44e-9
|
|
L2_SB_MUX_DELAY: 1.44e-9
|
|
L4_SB_MUX_DELAY: 1.44e-9
|
|
CB_MUX_DELAY: 1.38e-9
|
|
L1_WIRE_R: 100
|
|
L1_WIRE_C: 1e-12
|
|
L2_WIRE_R: 100
|
|
L2_WIRE_C: 1e-12
|
|
L4_WIRE_R: 100
|
|
L4_WIRE_C: 1e-12
|
|
INPAD_DELAY: 0.11e-9
|
|
OUTPAD_DELAY: 0.11e-9
|
|
FF_T_SETUP: 0.39e-9
|
|
FF_T_CLK2Q: 0.43e-9
|
|
LUT_OUT0_TO_FF_D_DELAY: 1.14e-9
|
|
LUT_OUT1_TO_FF_D_DELAY: 0.56e-9
|
|
LUT_OUT0_TO_FLE_OUT_DELAY: 0.89e-9
|
|
FF0_Q_TO_FLE_OUT_DELAY: 0.88e-9
|
|
LUT_OUT1_TO_FLE_OUT_DELAY: 0.78e-9
|
|
FF1_Q_TO_FLE_OUT_DELAY: 0.89e-9
|
|
LUT_CIN2LUT3_OUT_DELAY: 1.21e-9
|
|
LUT_CIN2LUT4_OUT_DELAY: 1.21e-9
|
|
LUT_CIN2COUT_DELAY: 1.21e-9
|
|
LUT_IN2COUT_DELAY: 1.21e-9
|
|
LUT3_DELAY: 0.92e-9
|
|
LUT3_OUT_TO_FLE_OUT_DELAY: 1.44e-9
|
|
LUT4_DELAY: 1.21e-9
|
|
LUT4_OUT_TO_FLE_OUT_DELAY: 1.46e-9
|
|
ADDER_LUT4_CIN2OUT_DELAY: 1.21e-9
|
|
ADDER_LUT4_CIN2COUT_DELAY: 1.21e-9
|
|
ADDER_LUT4_IN2OUT_DELAY: 1.21e-9
|
|
ADDER_LUT4_IN2COUT_DELAY: 1.21e-9
|
|
CLB_LR_IN2IN_DELAY: 1.46e-9
|
|
CLB_LR_OUT2IN_DELAY: 1.46e-9
|
|
MULT9_A2Y_DELAY_MAX: 1.523e-9
|
|
MULT9_A2Y_DELAY_MIN: 0.776e-9
|
|
MULT9_B2Y_DELAY_MAX: 1.523e-9
|
|
MULT9_B2Y_DELAY_MIN: 0.776e-9
|
|
MULT18_A2Y_DELAY_MAX: 1.523e-9
|
|
MULT18_A2Y_DELAY_MIN: 0.776e-9
|
|
MULT18_B2Y_DELAY_MAX: 1.523e-9
|
|
MULT18_B2Y_DELAY_MIN: 0.776e-9
|
|
MULT18_LR_A2A_DELAY_MAX: 1.46e-9
|
|
MULT18_LR_A2A_DELAY_MIN: 1.46e-9
|
|
MULT18_LR_B2B_DELAY_MAX: 1.46e-9
|
|
MULT18_LR_B2B_DELAY_MIN: 1.46e-9
|
|
|
|
|
|
################# Adder Delays #################
|
|
|
|
ADDER_CIN2OUT_DELAY: 1.21e-9
|
|
ADDER_CIN2COUT_DELAY: 1.21e-9
|
|
ADDER_IN2OUT_DELAY: 1.21e-9
|
|
ADDER_IN2COUT_DELAY: 1.21e-9
|
|
|
|
ARITHMETIC_ADDER_OUT_TO_ARITHMETIC_OUT: 25e-12
|
|
ARITHMETIC_FF_OUT_TO_ARITHMETIC_OUT: 45e-12
|
|
|
|
|
|
|
|
################# BRAM Delays #################
|
|
|
|
DPRAM_128x8_CLK_TO_WADDR_DELAY: 509e-12
|
|
DPRAM_128x8_CLK_TO_RADDR_DELAY: 509e-12
|
|
DPRAM_128x8_CLK_TO_DATA_IN_DELAY: 509e-12
|
|
DPRAM_128x8_CLK_TO_WEN_DELAY: 509e-12
|
|
DPRAM_128x8_CLK_TO_REN_DELAY: 509e-12
|
|
DPRAM_128x8_CLK_TO_DATA_OUT_DELAY: 6.73e-9
|
|
|
|
DPRAM_1024x8_CLK_TO_WADDR_DELAY: 509e-12
|
|
DPRAM_1024x8_CLK_TO_RADDR_DELAY: 509e-12
|
|
DPRAM_1024x8_CLK_TO_DATA_IN_DELAY: 509e-12
|
|
DPRAM_1024x8_CLK_TO_WEN_DELAY: 509e-12
|
|
DPRAM_1024x8_CLK_TO_REN_DELAY: 509e-12
|
|
DPRAM_1024x8_CLK_TO_DATA_OUT_DELAY: 6.73e-9
|
|
|
|
MEMORY_WADDR_TO_BRAM_WADDR_DELAY: 132e-12
|
|
MEMORY_RADDR_TO_BRAM_RADDR_DELAY: 132e-12
|
|
MEMORY_DATA_IN_TO_BRAM_DATA_IN_DELAY: 132e-12
|
|
MEMORY_WEN_TO_BRAM_WEN_DELAY: 132e-12
|
|
MEMORY_REN_TO_BRAM_REN_DELAY: 132e-12
|
|
BRAM_DATA_OUT_TO_MEMORY_DATA_OUT_DELAY: 40e-12 |