OpenFPGA/docs/source/arch_lang
tangxifan 1d766d2a70 minor format fix on documentation 2020-03-11 10:22:30 -06:00
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figures Point to point truth table typo fix 2019-10-01 13:07:27 -06:00
addon_vpr_syntax.rst update documentation in simulation setting syntax 2020-03-09 17:40:33 -06:00
annotate_vpr_arch.rst minor format fix on documentation 2020-03-11 10:22:30 -06:00
circuit_library.rst update documentation on circuit model annotation on VPR architecture 2020-03-10 16:51:50 -06:00
circuit_model_examples.rst reworked circuit model examples in documentation. Now we are consistent to latest syntax 2020-03-10 16:17:20 -06:00
direct_interconnect.rst update documentation in simulation setting syntax 2020-03-09 17:40:33 -06:00
generality.rst update documentation in simulation setting syntax 2020-03-09 17:40:33 -06:00
index.rst update documentation in simulation setting syntax 2020-03-09 17:40:33 -06:00
simulation_setting.rst update general documentation on circuit library 2020-03-10 12:18:12 -06:00
technology_library.rst minor format fix in documentation 2020-03-09 21:25:13 -06:00