OpenFPGA/openfpga
tangxifan 73461971d2 [Tool] Bug fix for printing single-bit ports in Verilog netlists 2021-02-28 16:12:57 -07:00
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src [Tool] Bug fix for printing single-bit ports in Verilog netlists 2021-02-28 16:12:57 -07:00
CMakeLists.txt [Tool] Deploy pin constraints to preconfig Verilog module generation 2021-01-19 16:56:30 -07:00