OpenFPGA/openfpga_flow/regression_test_scripts
tangxifan 7d83fc914c [core] ad a new test case 2023-10-06 18:31:54 -07:00
..
basic_reg_test.sh [core] fixed some bugs 2023-09-25 22:27:24 -07:00
basic_reg_yosys_only_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
fpga_bitstream_reg_test.sh [core] ad a new test case 2023-10-06 18:31:54 -07:00
fpga_sdc_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
fpga_spice_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
fpga_verilog_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
iwls_benchmark_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
micro_benchmark_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
quicklogic_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
tcl_reg_test.sh [script] enable eval mode in tcl reg test 2022-12-02 12:07:27 -08:00
vtr_benchmark_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00