tangxifan 795b30f76b [Arch] Add VPR architecture with partial pin equivalence		2020-11-02 11:54:25 -07:00
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OpenFPGAShellScripts	[Flow] bug fix in the sample script for fabric netlist customization	2020-10-12 12:52:01 -06:00
arch_bitstreams	[Architecture] Update external bitstream	2020-09-25 21:30:59 -06:00
benchmarks	[Benchmark] Bug fix in the and2_or2 benchmark	2020-09-17 10:35:13 -06:00
docs	Added first draft of fpga_task script	2019-08-09 00:17:06 -06:00
fabric_keys	[Architecture] Add example fabric key using multiple regions	2020-09-29 14:14:50 -06:00
misc	Fixed modelsim include references	2020-06-11 19:28:13 -06:00
openfpga_arch	[Arch] Add architecture example for multi-region frame-based architecture using both set/reset for configurable memories	2020-10-30 10:46:47 -06:00
openfpga_cell_library	[Architecture] Reorganize the cell netlists and update architecture files accordingly	2020-09-25 11:55:28 -06:00
openfpga_simulation_settings	add example simulation setting for openfpga flow	2020-06-11 19:31:15 -06:00
scripts	now pro_blif.pl can accept customized clock name	2020-08-19 09:43:44 -06:00
tasks	[Test] Add test case for fast configuration support on multi-region frame-based configuration protocol	2020-10-30 10:50:00 -06:00
tech	Added Power Model Files	2019-08-19 18:55:23 -06:00
vpr_arch	[Arch] Add VPR architecture with partial pin equivalence	2020-11-02 11:54:25 -07:00
.gitignore	Added first draft of fpga_task script	2019-08-09 00:17:06 -06:00