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OpenFPGA/fpga_flow/benchmarks/Blif/FPGA_SPICE_bench/dalu.blif

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.model TOP
.inputs Psh2 Psh1 Psh0 Popsel3 Popsel2 Popsel1 Popsel0 Pmusel4 Pmusel3 Pmusel2 \
Pmusel1 PinD15 PinD14 PinD13 PinD12 PinD11 PinD10 PinD9 PinD8 PinD7 PinD6 \
PinD5 PinD4 PinD3 PinD2 PinD1 PinD0 PinC15 PinC14 PinC13 PinC12 PinC11 PinC10 \
PinC9 PinC8 PinC7 PinC6 PinC5 PinC4 PinC3 PinC2 PinC1 PinC0 PinB15 PinB14 \
PinB13 PinB12 PinB11 PinB10 PinB9 PinB8 PinB7 PinB6 PinB5 PinB4 PinB3 PinB2 \
PinB1 PinB0 PinA15 PinA14 PinA13 PinA12 PinA11 PinA10 PinA9 PinA8 PinA7 PinA6 \
PinA5 PinA4 PinA3 PinA2 PinA1 PinA0
.outputs PO15 PO14 PO13 PO12 PO11 PO10 PO9 PO8 PO7 PO6 PO5 PO4 PO3 PO2 PO1 PO0
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00-- 1
-01- 1
0--1 1
--11 1
.names n28 n363 n153 n208 n397
1-1- 1
-11- 1
1--1 1
-1-1 1
.names PinD15 PinB15 n348 n349 n399
00-- 1
-01- 1
0--1 1
--11 1
.names PinD14 PinB14 n348 n349 n400
00-- 1
-01- 1
0--1 1
--11 1
.names PinD13 PinB13 n348 n349 n401
00-- 1
-01- 1
0--1 1
--11 1
.names PinD12 PinB12 n348 n349 n403
00-- 1
-01- 1
0--1 1
--11 1
.names PinD11 PinB11 n348 n349 n406
00-- 1
-01- 1
0--1 1
--11 1
.names PinD10 PinB10 n348 n349 n407
00-- 1
-01- 1
0--1 1
--11 1
.names n28 n208 n408
1- 1
-1 1
.names PinD1 PinB1 n348 n349 n409
00-- 1
-01- 1
0--1 1
--11 1
.names n22 n363 n226 n208 n410
1-1- 1
-11- 1
1--1 1
-1-1 1
.names Psh2 n122 n226 n411
11- 1
0-1 1
-11 1
.names PinD0 PinB0 n348 n349 n413
00-- 1
-01- 1
0--1 1
--11 1
.names n88 n363 n414
1- 1
-1 1
.names Psh2 n132 n207 n415
0-- 1
-1- 1
--1 1
.end
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