389 lines
15 KiB
C++
389 lines
15 KiB
C++
/**************************************************
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* This file includes a series of most utilized functions
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* that are used to implement a multiplexer
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*************************************************/
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#include <cmath>
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#include <algorithm>
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#include "spice_types.h"
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#include "util.h"
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#include "vtr_assert.h"
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#include "decoder_library_utils.h"
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#include "mux_utils.h"
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/* Validate the number of inputs for a multiplexer implementation,
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* the minimum supported size is 2
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* otherwise, there is no need for a MUX
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*/
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bool valid_mux_implementation_num_inputs(const size_t& mux_size) {
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return (2 <= mux_size);
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}
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/**************************************************
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* Find the actual number of datapath inputs for a multiplexer implementation
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* 1. if there are no requirements on constant inputs, mux_size is the actual one
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* 2. if there exist constant inputs, mux_size should minus 1
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* This function is mainly used to recover the number of datapath inputs
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* for MUXGraphs which is a generic representation without labelling datapath inputs
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*************************************************/
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size_t find_mux_num_datapath_inputs(const CircuitLibrary& circuit_lib,
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const CircuitModelId& circuit_model,
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const size_t& mux_size) {
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/* Should be either MUX or LUT
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* LUTs do have an tree-like MUX, but there is no need for a constant input!
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*/
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VTR_ASSERT ((SPICE_MODEL_MUX == circuit_lib.model_type(circuit_model))
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|| (SPICE_MODEL_LUT == circuit_lib.model_type(circuit_model)) );
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if (SPICE_MODEL_LUT == circuit_lib.model_type(circuit_model)) {
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return mux_size;
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}
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if (true == circuit_lib.mux_add_const_input(circuit_model)) {
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return mux_size - 1;
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}
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return mux_size;
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}
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/**************************************************
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* Find the actual number of inputs for a multiplexer implementation
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* 1. if there are no requirements on constant inputs, mux_size is the actual one
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* 2. if there exist constant inputs, mux_size should plus 1
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*************************************************/
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size_t find_mux_implementation_num_inputs(const CircuitLibrary& circuit_lib,
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const CircuitModelId& circuit_model,
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const size_t& mux_size) {
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/* Should be either MUX or LUT
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* LUTs do have an tree-like MUX, but there is no need for a constant input!
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*/
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VTR_ASSERT ((SPICE_MODEL_MUX == circuit_lib.model_type(circuit_model))
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|| (SPICE_MODEL_LUT == circuit_lib.model_type(circuit_model)) );
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if (SPICE_MODEL_LUT == circuit_lib.model_type(circuit_model)) {
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return mux_size;
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}
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if (true == circuit_lib.mux_add_const_input(circuit_model)) {
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return mux_size + 1;
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}
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return mux_size;
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}
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/**************************************************
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* Find the structure for a multiplexer implementation
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* 1. In most cases, the structure should follow the
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* mux_structure defined by users in the CircuitLibrary
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* 2. However, a special case may apply when mux_size is 2
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* In such case, we will force a TREE structure
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* regardless of users' specification as this is the
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* most efficient structure
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*************************************************/
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enum e_spice_model_structure find_mux_implementation_structure(const CircuitLibrary& circuit_lib,
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const CircuitModelId& circuit_model,
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const size_t& mux_size) {
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/* Ensure the mux size is valid ! */
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VTR_ASSERT(valid_mux_implementation_num_inputs(mux_size));
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/* Branch on the mux sizes */
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if (2 == mux_size) {
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/* Tree-like is the best structure of CMOS MUX2 */
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if (SPICE_MODEL_DESIGN_CMOS == circuit_lib.design_tech_type(circuit_model)) {
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return SPICE_MODEL_STRUCTURE_TREE;
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}
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VTR_ASSERT_SAFE(SPICE_MODEL_DESIGN_RRAM == circuit_lib.design_tech_type(circuit_model));
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/* One-level is the best structure of RRAM MUX2 */
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return SPICE_MODEL_STRUCTURE_ONELEVEL;
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}
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return circuit_lib.mux_structure(circuit_model);
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}
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/**************************************************
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* Find the number of levels for a tree-like multiplexer implementation
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*************************************************/
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size_t find_treelike_mux_num_levels(const size_t& mux_size) {
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/* Do log2(mux_size), have a basic number */
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size_t level = (size_t)(log((double)mux_size)/log(2.));
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/* Fix the error, i.e. mux_size=5, level = 2, we have to complete */
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while (mux_size > pow(2.,(double)level)) {
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level++;
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}
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return level;
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}
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/**************************************************
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* Find the number of inputs for majority of branches
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* in a multi-level multiplexer implementation
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*************************************************/
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size_t find_multilevel_mux_branch_num_inputs(const size_t& mux_size,
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const size_t& mux_level) {
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/* Special Case: mux_size = 2 */
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if (2 == mux_size) {
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return mux_size;
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}
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if (1 == mux_level) {
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return mux_size;
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}
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if (2 == mux_level) {
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size_t num_input_per_unit = (size_t)sqrt(mux_size);
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while ( num_input_per_unit * num_input_per_unit < mux_size) {
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num_input_per_unit++;
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}
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return num_input_per_unit;
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}
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VTR_ASSERT_SAFE(2 < mux_level);
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size_t num_input_per_unit = 2;
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while (pow((double)num_input_per_unit, (double)mux_level) < mux_size) {
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num_input_per_unit++;
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}
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if (!valid_mux_implementation_num_inputs(num_input_per_unit)) {
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vpr_printf(TIO_MESSAGE_ERROR,
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"(File:%s,[LINE%d]) Number of inputs of each basis should be at least 2!\n",
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__FILE__, __LINE__);
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exit(1);
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}
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return num_input_per_unit;
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}
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/**************************************************
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* Build a location map for intermediate buffers
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* that may appear at the multiplexing structure of a LUT
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* Here is a tricky thing:
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* By default, the first and last stage should not exist any intermediate buffers
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* For example:
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* There are 5 stages in a 4-stage multiplexer is available for buffering
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* but only 3 stages [1,2,3] are intermedate buffers
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* and these are users' specification
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*
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* +-------+ +-------+ +-------+ +-------+
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* location | stage | location | stage | location | stage | location | stage | location
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* [0] | [0] | [1] | [1] | [2] | [2] | [3] | [3] | [5]
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* +-------+ +-------+ +-------+ +-------+
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*
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* We will check if the length of location map matches the number of
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* multiplexer levels. And then complete a location map
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* for the given multiplexers
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*************************************************/
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std::vector<bool> build_mux_intermediate_buffer_location_map(const CircuitLibrary& circuit_lib,
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const CircuitModelId& circuit_model,
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const size_t& num_mux_levels) {
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/* Deposite a default location map */
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std::vector<bool> location_map(num_mux_levels, false);
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std::string location_map_str;
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/* ONLY for LUTs: intermediate buffers may exist if specified */
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if (SPICE_MODEL_LUT != circuit_lib.model_type(circuit_model)) {
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return location_map;
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}
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/* Get location map when the flag of intermediate buffer is on */
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if (true == circuit_lib.is_lut_intermediate_buffered(circuit_model)) {
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location_map_str = circuit_lib.lut_intermediate_buffer_location_map(circuit_model);
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}
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/* If no location map is specified, we can return here */
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if (location_map_str.empty()) {
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return location_map;
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}
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/* Check if the user-defined location map matches the number of mux levels*/
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VTR_ASSERT(num_mux_levels - 2 == location_map_str.length());
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/* Apply the location_map string to the intermediate stages of multiplexers */
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for (size_t i = 0; i < location_map_str.length(); ++i) {
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/* '1' indicates that an intermediate buffer is needed at the location */
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if ('1' == location_map_str[i]) {
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location_map[i + 1] = true;
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}
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}
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return location_map;
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}
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/**************************************************
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* Convert a linked list of MUX architecture to MuxLibrary
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* TODO: this function will be deleted when MUXLibrary fully
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* replace legacy data structures
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*************************************************/
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MuxLibrary convert_mux_arch_to_library(const CircuitLibrary& circuit_lib, t_llist* muxes_head) {
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t_llist* temp = muxes_head;
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MuxLibrary mux_lib;
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/* Walk through the linked list */
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while(temp) {
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VTR_ASSERT_SAFE(NULL != temp->dptr);
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t_spice_mux_model* cur_spice_mux_model = (t_spice_mux_model*)(temp->dptr);
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/* Bypass the spice models who has a user-defined subckt */
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if (NULL != cur_spice_mux_model->spice_model->verilog_netlist) {
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/* Move on to the next*/
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temp = temp->next;
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continue;
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}
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/* Build a MUX graph for the model */
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/* Find the circuit model id by the name */
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CircuitModelId circuit_model = circuit_lib.model(cur_spice_mux_model->spice_model->name);
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mux_lib.add_mux(circuit_lib, circuit_model, cur_spice_mux_model->size);
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/* Move on to the next*/
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temp = temp->next;
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}
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return mux_lib;
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}
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/**************************************************
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* Find the number of reserved configuration bits for a multiplexer
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* The reserved configuration bits is only used by ReRAM-based multiplexers
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* It is actually the shared BL/WLs among ReRAMs
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*************************************************/
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size_t find_mux_num_reserved_config_bits(const CircuitLibrary& circuit_lib,
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const CircuitModelId& mux_model,
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const MuxGraph& mux_graph) {
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if (SPICE_MODEL_DESIGN_RRAM != circuit_lib.design_tech_type(mux_model)) {
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return 0;
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}
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std::vector<size_t> mux_branch_sizes = mux_graph.branch_sizes();
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/* For tree-like multiplexers: they have two shared configuration bits */
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if ( (1 == mux_branch_sizes.size())
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&& (2 == mux_branch_sizes[0]) ) {
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return mux_branch_sizes[0];
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}
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/* One-level multiplexer */
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if ( 1 == mux_graph.num_levels() ) {
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return mux_graph.num_inputs();
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}
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/* Multi-level multiplexers: TODO: This should be better tested and clarified
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* Now the multi-level multiplexers are treated as cascaded one-level multiplexers
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* Use the maximum branch sizes and multiply it by the number of levels
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*/
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std::vector<size_t>::iterator max_mux_branch_size = std::max_element(mux_branch_sizes.begin(), mux_branch_sizes.end());
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return mux_graph.num_levels() * (*max_mux_branch_size);
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}
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/**************************************************
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* Find the number of configuration bits for a CMOS multiplexer
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* In general, the number of configuration bits is
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* the number of memory bits for a mux_graph
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* However, when local decoders are used,
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* the number of configuration bits are reduced to log2(X)
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*************************************************/
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static
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size_t find_cmos_mux_num_config_bits(const CircuitLibrary& circuit_lib,
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const CircuitModelId& mux_model,
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const MuxGraph& mux_graph,
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const e_sram_orgz& sram_orgz_type) {
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size_t num_config_bits = 0;
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switch (sram_orgz_type) {
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case SPICE_SRAM_MEMORY_BANK:
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case SPICE_SRAM_SCAN_CHAIN:
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case SPICE_SRAM_STANDALONE:
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num_config_bits = mux_graph.num_memory_bits();
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break;
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default:
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vpr_printf(TIO_MESSAGE_ERROR,
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"(FILE:%s,LINE[%d])Invalid type of SRAM organization!\n",
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__FILE__, __LINE__);
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exit(1);
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}
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if (false == circuit_lib.mux_use_local_encoder(mux_model)) {
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return num_config_bits;
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}
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num_config_bits = 0;
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/* Multiplexer local encoders are applied to memory bits at each stage */
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for (const auto& lvl : mux_graph.levels()) {
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num_config_bits += find_mux_local_decoder_addr_size(mux_graph.num_memory_bits_at_level(lvl));
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}
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return num_config_bits;
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}
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/**************************************************
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* Find the number of configuration bits for a RRAM multiplexer
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* In general, the number of configuration bits is
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* the number of levels for a mux_graph
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* This is due to only the last BL/WL of the multiplexer is
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* independent from each other
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* However, when local decoders are used,
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* the number of configuration bits should be consider all the
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* shared(reserved) configuration bits and independent bits
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*************************************************/
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static
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size_t find_rram_mux_num_config_bits(const CircuitLibrary& circuit_lib,
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const CircuitModelId& mux_model,
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const MuxGraph& mux_graph,
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const e_sram_orgz& sram_orgz_type) {
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size_t num_config_bits = 0;
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switch (sram_orgz_type) {
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case SPICE_SRAM_MEMORY_BANK:
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/* In memory bank, by intensively share the Bit/Word Lines,
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* we only need 1 additional BL and WL for each MUX level.
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*/
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num_config_bits = mux_graph.num_levels();
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break;
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case SPICE_SRAM_SCAN_CHAIN:
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case SPICE_SRAM_STANDALONE:
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/* Currently we DO NOT SUPPORT THESE, given an invalid number */
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num_config_bits = size_t(-1);
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break;
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default:
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vpr_printf(TIO_MESSAGE_ERROR,
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"(FILE:%s,LINE[%d])Invalid type of SRAM organization!\n",
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__FILE__, __LINE__);
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exit(1);
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}
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if (true == circuit_lib.mux_use_local_encoder(mux_model)) {
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/* TODO: this is a to-do work for ReRAM-based multiplexers and FPGAs
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* The number of states of a local decoder only depends on how many
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* memory bits that the multiplexer will have
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* This may NOT be correct!!!
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*/
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return find_mux_local_decoder_addr_size(mux_graph.num_memory_bits());
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}
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return num_config_bits;
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}
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/**************************************************
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* Find the number of configuration bits for
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* a routing multiplexer
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* Two cases are considered here.
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* They are placed in different branches (sub-functions)
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* in order to be easy in extending to new technology!
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*************************************************/
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size_t find_mux_num_config_bits(const CircuitLibrary& circuit_lib,
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const CircuitModelId& mux_model,
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const MuxGraph& mux_graph,
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const e_sram_orgz& sram_orgz_type) {
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size_t num_config_bits = size_t(-1);
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switch (circuit_lib.design_tech_type(mux_model)) {
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case SPICE_MODEL_DESIGN_CMOS:
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num_config_bits = find_cmos_mux_num_config_bits(circuit_lib, mux_model, mux_graph, sram_orgz_type);
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break;
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case SPICE_MODEL_DESIGN_RRAM:
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num_config_bits = find_rram_mux_num_config_bits(circuit_lib, mux_model, mux_graph, sram_orgz_type);
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break;
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default:
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vpr_printf(TIO_MESSAGE_ERROR,
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"(FILE:%s,LINE[%d])Invalid design_technology of MUX(name: %s)\n",
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__FILE__, __LINE__, circuit_lib.model_name(mux_model).c_str());
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exit(1);
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}
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return num_config_bits;
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}
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