52 lines
2.2 KiB
C++
52 lines
2.2 KiB
C++
/********************************************************************
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* This file include most utilized functions in generating simulations
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* Note: function placed here MUST be generic enough for both SPICE
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* and Verilog simulations!
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*******************************************************************/
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#include "simulation_utils.h"
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#include <cmath>
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/* begin namespace openfpga */
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namespace openfpga {
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/********************************************************************
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* Compute the time period for the simulation
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*******************************************************************/
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float find_operating_phase_simulation_time(const int &num_op_clock_cycles,
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const float &op_clock_period,
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const float ×cale) {
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/* Take into account the prog_reset and reset cycles
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* 1e9 is to change the unit to ns rather than second
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*/
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return ((float)num_op_clock_cycles * op_clock_period) / timescale;
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}
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/********************************************************************
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* Find the the full time period of a simulation, including
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* both the programming time and operating time
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* This is a generic function that can be used to generate simulation
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* time period for SPICE/Verilog simulators
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*******************************************************************/
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float find_simulation_time_period(const float &time_unit,
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const int &num_prog_clock_cycles,
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const float &prog_clock_period,
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const int &num_op_clock_cycles,
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const float &op_clock_period) {
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float total_time_period = 0.;
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/* Take into account
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* - the prog_reset
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* - the gap clock cycle between programming and operating phase
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* - 2 reset cycles before operating phase starts
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* This is why the magic number 2 and 2 are added
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*/
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total_time_period = ((float)num_prog_clock_cycles + 2) * prog_clock_period +
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((float)num_op_clock_cycles + 2) * op_clock_period;
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total_time_period = total_time_period / time_unit;
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return total_time_period;
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}
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} /* end namespace openfpga */
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