190 lines
8.1 KiB
C++
190 lines
8.1 KiB
C++
/* Headers from vtrutil library */
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#include "rename_modules.h"
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#include "command_exit_codes.h"
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#include "openfpga_naming.h"
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#include "vtr_assert.h"
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#include "vtr_log.h"
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#include "vtr_time.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/** @brief Initialize a module name map with the existing module names from a
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* module manager. In this case, all the built-in names are the same as
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* customized names */
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int init_fabric_module_name_map(ModuleNameMap& module_name_map,
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const ModuleManager& module_manager,
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const bool& verbose) {
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int status = CMD_EXEC_SUCCESS;
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/* the module name map should be empty! */
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module_name_map.clear();
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size_t cnt = 0;
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for (ModuleId curr_module : module_manager.modules()) {
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status = module_name_map.set_tag_to_name_pair(
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module_manager.module_name(curr_module),
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module_manager.module_name(curr_module));
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if (status != CMD_EXEC_SUCCESS) {
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return CMD_EXEC_SUCCESS;
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}
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cnt++;
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}
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VTR_LOGV(verbose, "Initialized module name map for '%lu' modules\n", cnt);
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return CMD_EXEC_SUCCESS;
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}
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int update_module_map_name_with_indexing_names(ModuleNameMap& module_name_map,
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const DeviceRRGSB& device_rr_gsb,
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const FabricTile& fabric_tile,
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const bool& verbose) {
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int status = CMD_EXEC_SUCCESS;
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/* Walk through the device rr gsb on the unique routing modules */
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for (size_t isb = 0; isb < device_rr_gsb.get_num_sb_unique_module(); ++isb) {
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const RRGSB& unique_mirror = device_rr_gsb.get_sb_unique_module(isb);
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vtr::Point<size_t> gsb_coordinate(unique_mirror.get_sb_x(),
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unique_mirror.get_sb_y());
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std::string name_using_coord =
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generate_switch_block_module_name(gsb_coordinate);
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std::string name_using_index =
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generate_switch_block_module_name_using_index(isb);
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status =
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module_name_map.set_tag_to_name_pair(name_using_coord, name_using_index);
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if (status != CMD_EXEC_SUCCESS) {
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return CMD_EXEC_SUCCESS;
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}
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VTR_LOGV(verbose, "Now use indexing name for module '%s' (was '%s')\n",
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name_using_index.c_str(), name_using_coord.c_str());
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}
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for (t_rr_type cb_type : {CHANX, CHANY}) {
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for (size_t icb = 0; icb < device_rr_gsb.get_num_cb_unique_module(cb_type);
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++icb) {
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const RRGSB& unique_mirror =
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device_rr_gsb.get_cb_unique_module(cb_type, icb);
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vtr::Point<size_t> gsb_coordinate(unique_mirror.get_cb_x(cb_type),
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unique_mirror.get_cb_y(cb_type));
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std::string name_using_coord =
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generate_connection_block_module_name(cb_type, gsb_coordinate);
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std::string name_using_index =
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generate_connection_block_module_name_using_index(cb_type, icb);
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status = module_name_map.set_tag_to_name_pair(name_using_coord,
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name_using_index);
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if (status != CMD_EXEC_SUCCESS) {
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return CMD_EXEC_SUCCESS;
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}
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VTR_LOGV(verbose, "Now use indexing name for module '%s' (was '%s')\n",
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name_using_index.c_str(), name_using_coord.c_str());
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}
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}
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/* Walk through the fabric tile on the unique routing modules */
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for (size_t itile = 0; itile < fabric_tile.unique_tiles().size(); ++itile) {
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FabricTileId fabric_tile_id = fabric_tile.unique_tiles()[itile];
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vtr::Point<size_t> tile_coord = fabric_tile.tile_coordinate(fabric_tile_id);
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std::string name_using_coord = generate_tile_module_name(tile_coord);
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std::string name_using_index = generate_tile_module_name_using_index(itile);
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status =
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module_name_map.set_tag_to_name_pair(name_using_coord, name_using_index);
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if (status != CMD_EXEC_SUCCESS) {
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return CMD_EXEC_SUCCESS;
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}
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VTR_LOGV(verbose, "Now use indexing name for module '%s' (was '%s')\n",
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name_using_index.c_str(), name_using_coord.c_str());
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}
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return CMD_EXEC_SUCCESS;
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}
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/** @brief Apply module renaming for all the modules. Require the module name
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* map cover all the modules */
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int rename_fabric_modules(ModuleManager& module_manager,
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const ModuleNameMap& module_name_map,
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const bool& verbose) {
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int status = CMD_EXEC_SUCCESS;
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size_t cnt = 0;
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for (ModuleId curr_module : module_manager.modules()) {
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std::string curr_module_name = module_manager.module_name(curr_module);
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/* Error out if the new name does not exist ! */
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if (!module_name_map.name_exist(curr_module_name)) {
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VTR_LOG_ERROR(
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"The built-in module name '%s' does not exist! Abort renaming...\n",
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curr_module_name.c_str());
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return CMD_EXEC_FATAL_ERROR;
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}
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std::string new_name = module_name_map.name(curr_module_name);
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if (new_name != curr_module_name) {
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VTR_LOGV(verbose, "Rename module '%s' to its new name '%s'\n",
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curr_module_name.c_str(), new_name.c_str());
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module_manager.set_module_name(curr_module, new_name);
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}
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cnt++;
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}
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VTR_LOG("Renamed %lu modules\n", cnt);
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return status;
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}
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/** @brief Apply module renaming based on the pairs given by module name map
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* only. So not all the modules are renamed. So the module name map just cover a
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* subset of modules */
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int partial_rename_fabric_modules(ModuleManager& module_manager,
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const ModuleNameMap& module_name_map,
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const bool& verbose) {
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int status = CMD_EXEC_SUCCESS;
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size_t cnt = 0;
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for (std::string built_in_name : module_name_map.tags()) {
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ModuleId curr_module = module_manager.find_module(built_in_name);
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if (!module_manager.valid_module_id(curr_module)) {
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VTR_LOG_ERROR(
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"The built-in module name '%s' does not exist! Abort renaming...\n",
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built_in_name.c_str());
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return CMD_EXEC_FATAL_ERROR;
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}
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std::string new_name = module_name_map.name(built_in_name);
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if (new_name != built_in_name) {
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VTR_LOGV(verbose, "Rename module '%s' to its new name '%s'\n",
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built_in_name.c_str(), new_name.c_str());
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module_manager.set_module_name(curr_module, new_name);
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}
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cnt++;
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}
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VTR_LOG("Renamed %lu modules\n", cnt);
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return status;
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}
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/** @brief The module name map kept in openfpga context always has a built-in
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* name with coordinates. while users apply renaming or other internal renaming
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* is applied, e.g., through option '--name_module_using_index', the module name
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* in the module graph can be changed. So in the user's version, the built-in
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* name may become index or anything else. We have to keep the built-in name
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* consistent (use coordinates, otherwise other engines may not work, which rely
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* on this convention) while the given name should follow the users' definition.
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* So we need an update here For example: the current module name map is
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* 'tile_1__1_' -> 'tile_4_' the user's module name map is 'tile_4_' ->
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* 'tile_big' The resulting module name map is 'tile_1__1_' -> 'tile_big'
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*/
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int update_module_name_map_with_user_version(
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ModuleNameMap& curr_module_name_map,
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const ModuleNameMap& user_module_name_map, const bool& verbose) {
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int status = CMD_EXEC_SUCCESS;
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size_t cnt = 0;
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for (std::string user_tag : user_module_name_map.tags()) {
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if (!curr_module_name_map.tag_exist(user_tag)) {
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VTR_LOG_ERROR(
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"The built-in module name '%s' given by user does not exist in current "
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"module name map! Abort updating...\n",
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user_tag.c_str());
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return CMD_EXEC_FATAL_ERROR;
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}
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std::string built_in_tag = curr_module_name_map.tag(user_tag);
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curr_module_name_map.set_tag_to_name_pair(
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built_in_tag, user_module_name_map.name(user_tag));
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VTR_LOGV(verbose,
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"Now module built-in name '%s' is pointed to its new name '%s' "
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"(old name '%s' is deleted)\n",
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built_in_tag.c_str(), user_module_name_map.name(user_tag).c_str(),
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user_tag.c_str());
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cnt++;
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}
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VTR_LOGV(verbose, "Update %lu built-in-to-name pairs\n", cnt);
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return status;
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}
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} /* end namespace openfpga */
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