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OpenFPGA/openfpga_flow/tasks/fpga_verilog/dsp
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tangxifan 1c6b9a23d7 [Test] Add new test for multi-mode 16-bit DSP blocks 2021-04-24 13:29:29 -06:00
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multi_mode_mult_16x16/config [Test] Add new test for multi-mode 16-bit DSP blocks 2021-04-24 13:29:29 -06:00
single_mode_mult_8x8/config [Test] Deploy new mac benchmarks to tests 2021-04-23 20:44:14 -06:00