tangxifan 812af4f722 [arch] add arch that supports negative edge triggered flip-flop		2022-05-09 16:32:01 +08:00
..
spice	[Architecture] Reorganize the cell netlists and update architecture files accordingly	2020-09-25 11:55:28 -06:00
spice_testbench	[Architecture] Reorganize the cell netlists and update architecture files accordingly	2020-09-25 11:55:28 -06:00
verilog	[arch] add arch that supports negative edge triggered flip-flop	2022-05-09 16:32:01 +08:00
verilog_testbench	[Architecture] Reorganize the cell netlists and update architecture files accordingly	2020-09-25 11:55:28 -06:00
Makefile	[test] add regression test to validate compilation of openfpga cell library files	2022-05-09 16:00:51 +08:00
verilog_sources.f	[test] add regression test to validate compilation of openfpga cell library files	2022-05-09 16:00:51 +08:00