OpenFPGA/openfpga_flow
tangxifan 7729f671ab [Regression Tests] Remove deadlink 2020-09-22 18:35:41 -06:00
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OpenFPGAShellScripts [Regression Tests] Now use fixed device layout in test cases for best coverage 2020-09-21 18:44:13 -06:00
SpiceNetlists Moved spice and verilog netlist folder location 2019-08-17 01:49:49 -06:00
VerilogNetlists [Architecture] Add Verilog HDL for fracturable 32-bit multiplier 2020-09-22 15:15:19 -06:00
arch_bitstreams add load architecture bitstream test case and reorganize regression tests in category of openfpga tools 2020-07-27 15:54:46 -06:00
benchmarks [Benchmark] Bug fix in the and2_or2 benchmark 2020-09-17 10:35:13 -06:00
docs Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00
fabric_keys update fabric key to synchronize with new module/instance naming 2020-07-24 12:55:40 -06:00
misc Fixed modelsim include references 2020-06-11 19:28:13 -06:00
openfpga_arch [Architecture] Add OpenFPGA architecture for k4n4 with fracturable 32-bit multiplier 2020-09-22 15:31:34 -06:00
openfpga_simulation_settings add example simulation setting for openfpga flow 2020-06-11 19:31:15 -06:00
scripts now pro_blif.pl can accept customized clock name 2020-08-19 09:43:44 -06:00
tasks [Regression Tests] Remove deadlink 2020-09-22 18:35:41 -06:00
tech Added Power Model Files 2019-08-19 18:55:23 -06:00
vpr_arch [Architecture] Add vpr architecture for k4n4 with fracturable 32-bit multiplier 2020-09-22 15:32:11 -06:00
.gitignore Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00