62 lines
1.9 KiB
C++
62 lines
1.9 KiB
C++
/********************************************************************
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* Unit test functions to validate the correctness of
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* 1. parser of data structures
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* 2. writer of data structures
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*******************************************************************/
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/* Headers from vtrutils */
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#include "vtr_assert.h"
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#include "vtr_log.h"
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/* Headers from fabric key */
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#include "blif_head_reader.h"
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#include "io_net_place.h"
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#include "pcf2place.h"
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#include "pcf_reader.h"
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#include "read_csv_io_pin_table.h"
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#include "read_xml_io_location_map.h"
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int main(int argc, const char** argv) {
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/* Ensure we have the following arguments:
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* 1. Input - Users Design Constraints (.pcf)
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* 2. Input - Netlist (.blif)
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* 3. Input - Fabic I/O location map (.xml)
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* 4. Input - Chip pin table (.csv)
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* 5. Output - I/O placement (.place)
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*/
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VTR_ASSERT(6 == argc);
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/* Parse the input files */
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openfpga::PcfData pcf_data;
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openfpga::read_pcf(argv[1], pcf_data);
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VTR_LOG("Read the design constraints from a pcf file: %s.\n", argv[1]);
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blifparse::BlifHeadReader callback;
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blifparse::blif_parse_filename(argv[2], callback);
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VTR_LOG("Read the blif from a file: %s.\n", argv[2]);
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if (callback.had_error()) {
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VTR_LOG("Read the blif ends with errors\n", argv[2]);
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return 1;
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}
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openfpga::IoLocationMap io_location_map =
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openfpga::read_xml_io_location_map(argv[3]);
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VTR_LOG("Read the I/O location map from an XML file: %s.\n", argv[3]);
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openfpga::IoPinTable io_pin_table = openfpga::read_csv_io_pin_table(argv[4]);
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VTR_LOG("Read the I/O pin table from a csv file: %s.\n", argv[4]);
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/* Convert */
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openfpga::IoNetPlace io_net_place;
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int status =
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pcf2place(pcf_data, callback.input_pins(), callback.output_pins(),
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io_pin_table, io_location_map, io_net_place);
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if (status) {
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return status;
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}
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/* Output */
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status = io_net_place.write_to_place_file(argv[5], true, true);
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return status;
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}
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