160 lines
6.2 KiB
Verilog
160 lines
6.2 KiB
Verilog
//////////////////////////////////////////////////////////////////////
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//// ////
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//// spi_define.v ////
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//// ////
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//// This file is part of the SPI IP core project ////
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//// http://www.opencores.org/projects/spi/ ////
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//// ////
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//// Author(s): ////
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//// - Simon Srot (simons@opencores.org) ////
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//// ////
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//// All additional information is avaliable in the Readme.txt ////
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//// file. ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2002 Authors ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//
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// Number of bits used for devider register. If used in system with
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// low frequency of system clock this can be reduced.
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// Use SPI_DIVIDER_LEN for fine tuning theexact number.
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//
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//`define SPI_DIVIDER_LEN_8
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`define SPI_DIVIDER_LEN_16
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//`define SPI_DIVIDER_LEN_24
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//`define SPI_DIVIDER_LEN_32
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`ifdef SPI_DIVIDER_LEN_8
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`define SPI_DIVIDER_LEN 8 // Can be set from 1 to 8
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`endif
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`ifdef SPI_DIVIDER_LEN_16
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`define SPI_DIVIDER_LEN 16 // Can be set from 9 to 16
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`endif
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`ifdef SPI_DIVIDER_LEN_24
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`define SPI_DIVIDER_LEN 24 // Can be set from 17 to 24
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`endif
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`ifdef SPI_DIVIDER_LEN_32
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`define SPI_DIVIDER_LEN 32 // Can be set from 25 to 32
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`endif
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//
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// Maximum nuber of bits that can be send/received at once.
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// Use SPI_MAX_CHAR for fine tuning the exact number, when using
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// SPI_MAX_CHAR_32, SPI_MAX_CHAR_24, SPI_MAX_CHAR_16, SPI_MAX_CHAR_8.
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//
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`define SPI_MAX_CHAR_128
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//`define SPI_MAX_CHAR_64
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//`define SPI_MAX_CHAR_32
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//`define SPI_MAX_CHAR_24
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//`define SPI_MAX_CHAR_16
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//`define SPI_MAX_CHAR_8
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`ifdef SPI_MAX_CHAR_128
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`define SPI_MAX_CHAR 128 // Can only be set to 128
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`define SPI_CHAR_LEN_BITS 7
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`endif
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`ifdef SPI_MAX_CHAR_64
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`define SPI_MAX_CHAR 64 // Can only be set to 64
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`define SPI_CHAR_LEN_BITS 6
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`endif
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`ifdef SPI_MAX_CHAR_32
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`define SPI_MAX_CHAR 32 // Can be set from 25 to 32
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`define SPI_CHAR_LEN_BITS 5
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`endif
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`ifdef SPI_MAX_CHAR_24
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`define SPI_MAX_CHAR 24 // Can be set from 17 to 24
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`define SPI_CHAR_LEN_BITS 5
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`endif
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`ifdef SPI_MAX_CHAR_16
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`define SPI_MAX_CHAR 16 // Can be set from 9 to 16
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`define SPI_CHAR_LEN_BITS 4
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`endif
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`ifdef SPI_MAX_CHAR_8
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`define SPI_MAX_CHAR 8 // Can be set from 1 to 8
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`define SPI_CHAR_LEN_BITS 3
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`endif
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//
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// Number of device select signals. Use SPI_SS_NB for fine tuning the
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// exact number.
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//
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`define SPI_SS_NB_8
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//`define SPI_SS_NB_16
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//`define SPI_SS_NB_24
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//`define SPI_SS_NB_32
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`ifdef SPI_SS_NB_8
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`define SPI_SS_NB 8 // Can be set from 1 to 8
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`endif
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`ifdef SPI_SS_NB_16
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`define SPI_SS_NB 16 // Can be set from 9 to 16
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`endif
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`ifdef SPI_SS_NB_24
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`define SPI_SS_NB 24 // Can be set from 17 to 24
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`endif
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`ifdef SPI_SS_NB_32
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`define SPI_SS_NB 32 // Can be set from 25 to 32
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`endif
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//
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// Bits of WISHBONE address used for partial decoding of SPI registers.
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//
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`define SPI_OFS_BITS 4:2
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//
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// Register offset
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//
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`define SPI_RX_0 0
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`define SPI_RX_1 1
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`define SPI_RX_2 2
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`define SPI_RX_3 3
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`define SPI_TX_0 0
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`define SPI_TX_1 1
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`define SPI_TX_2 2
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`define SPI_TX_3 3
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`define SPI_CTRL 4
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`define SPI_DEVIDE 5
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`define SPI_SS 6
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//
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// Number of bits in ctrl register
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//
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`define SPI_CTRL_BIT_NB 14
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//
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// Control register bit position
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//
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`define SPI_CTRL_ASS 13
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`define SPI_CTRL_IE 12
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`define SPI_CTRL_LSB 11
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`define SPI_CTRL_TX_NEGEDGE 10
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`define SPI_CTRL_RX_NEGEDGE 9
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`define SPI_CTRL_GO 8
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`define SPI_CTRL_RES_1 7
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`define SPI_CTRL_CHAR_LEN 6:0
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