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OpenFPGA
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OpenFPGA/openfpga
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tangxifan 2c5634ee76 [Tool] Change pin naming of grid modules to be related to architecture port names 2021-03-13 20:05:18 -07:00
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src [Tool] Change pin naming of grid modules to be related to architecture port names 2021-03-13 20:05:18 -07:00
CMakeLists.txt [Tool] Deploy pin constraints to preconfig Verilog module generation 2021-01-19 16:56:30 -07:00