OpenFPGA/yosys/techlibs/anlogic
tangxifan 4d62dc1c3e Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00
..
Makefile.inc Update Yosys from version 0.7 to version 0.8 2019-05-23 16:03:08 -06:00
anlogic_determine_init.cc Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00
anlogic_eqn.cc Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00
arith_map.v Update Yosys from version 0.7 to version 0.8 2019-05-23 16:03:08 -06:00
cells_map.v Update Yosys from version 0.7 to version 0.8 2019-05-23 16:03:08 -06:00
cells_sim.v Update yosys to latest version + add simulation in fpga_flow 2019-05-23 17:55:49 -06:00
dram_init_16x4.vh Update Yosys from version 0.7 to version 0.8 2019-05-23 16:03:08 -06:00
drams.txt Update Yosys from version 0.7 to version 0.8 2019-05-23 16:03:08 -06:00
drams_map.v Update Yosys from version 0.7 to version 0.8 2019-05-23 16:03:08 -06:00
eagle_bb.v Update Yosys from version 0.7 to version 0.8 2019-05-23 16:03:08 -06:00
synth_anlogic.cc Update Yosys from version 0.7 to version 0.8 2019-05-23 16:03:08 -06:00