riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
OpenFPGA/vpr7_x2p/vpr/SRC/fpga_x2p
History
tangxifan 22e71f5847 Add rotate one side of switch block functionality 2019-05-25 22:48:07 -06:00
..
base Add rotate one side of switch block functionality 2019-05-25 22:48:07 -06:00
bitstream updated bitstream to use new RRSwitchBlock as well as the report timing engine 2019-05-24 12:54:10 -06:00
clb_pin_remap cleaned unused variables 2019-05-13 14:45:02 -06:00
router cleaned unused variables 2019-05-13 14:45:02 -06:00
shell Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb 2019-05-13 14:45:57 -06:00
spice Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb 2019-05-13 14:45:57 -06:00
verilog clean warnings 2019-05-24 16:48:08 -06:00