OpenFPGA/.github/workflows
tangxifan a80acfb547 [Test] Add new test case to CI script 2021-02-01 11:16:12 -07:00
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basic_reg_test.sh Microbenchmarks of Single-Port RAM and Associated Example Architecture Files as well as Test Cases (#200) 2021-01-29 10:19:05 -07:00
build.yml Checking complete flow of build.yml from non master branch (#207) 2021-01-30 09:40:53 -07:00
docker.yml Fix dockerfile for master build to include yosys/share, and fix conditionals. 2021-01-21 16:40:09 -07:00
fpga_bitstream_reg_test.sh [Regression] Upgraded runtime enviroment to python3.8 2021-01-26 16:40:45 -07:00
fpga_sdc_reg_test.sh [Regression] Upgraded runtime enviroment to python3.8 2021-01-26 16:40:45 -07:00
fpga_spice_reg_test.sh [Regression] Upgraded runtime enviroment to python3.8 2021-01-26 16:40:45 -07:00
fpga_verilog_reg_test.sh [Test] Add new test case to CI script 2021-02-01 11:16:12 -07:00
install_dependencies_build.sh Add missing tcl dependencies 2020-12-22 18:14:09 -07:00
install_dependencies_run.sh [Regression] Upgraded runtime enviroment to python3.8 2021-01-26 16:40:45 -07:00
install_dependency_old.sh Fix dependency script reference in old build 2021-01-25 11:58:35 -07:00
labeler.yml Add docker build workflow and fix submodule issues. 2020-12-22 17:37:14 -07:00