30 lines
1.1 KiB
TeX
30 lines
1.1 KiB
TeX
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\chapter{Application Notes}
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\label{chapter:appnotes}
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% \begin{fixme}
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% This appendix will cover some typical use-cases of Yosys in the form of application notes.
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% \end{fixme}
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%
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% \section{Synthesizing using a Cell Library in Liberty Format}
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% \section{Reverse Engineering the MOS6502 from an NMOS Transistor Netlist}
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% \section{Reconfigurable Coarse-Grain Synthesis using Intersynth}
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This appendix contains copies of the Yosys application notes.
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\begin{itemize}
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\item Yosys AppNote 010: Converting Verilog to BLIF \dotfill Page \pageref{app:010} \hskip2cm\null
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\item Yosys AppNote 011: Interactive Design Investigation \dotfill Page \pageref{app:011} \hskip2cm\null
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\item Yosys AppNote 012: Converting Verilog to BTOR \dotfill Page \pageref{app:012} \hskip2cm\null
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\end{itemize}
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\eject\label{app:010}
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\includepdf[pages=-,pagecommand=\thispagestyle{plain}]{APPNOTE_010_Verilog_to_BLIF.pdf}
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\eject\label{app:011}
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\includepdf[pages=-,pagecommand=\thispagestyle{plain}]{APPNOTE_011_Design_Investigation.pdf}
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\eject\label{app:012}
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\includepdf[pages=-,pagecommand=\thispagestyle{plain}]{APPNOTE_012_Verilog_to_BTOR.pdf}
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