186 lines
9.5 KiB
SourcePawn
186 lines
9.5 KiB
SourcePawn
*****************************
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* FPGA SPICE Netlist *
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* Description: Connection Block X-channel [1][0] in FPGA *
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* Author: Xifan TANG *
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* Organization: EPFL/IC/LSI *
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* Date: Thu Nov 15 14:26:04 2018
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*
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*****************************
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.subckt cbx[1][0]
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+ chanx[1][0]_midout[0]
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+ chanx[1][0]_midout[1]
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+ chanx[1][0]_midout[2]
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+ chanx[1][0]_midout[3]
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+ chanx[1][0]_midout[4]
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+ chanx[1][0]_midout[5]
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+ chanx[1][0]_midout[6]
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+ chanx[1][0]_midout[7]
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+ chanx[1][0]_midout[8]
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+ chanx[1][0]_midout[9]
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+ chanx[1][0]_midout[10]
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+ chanx[1][0]_midout[11]
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+ chanx[1][0]_midout[12]
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+ chanx[1][0]_midout[13]
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+ chanx[1][0]_midout[14]
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+ chanx[1][0]_midout[15]
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+ chanx[1][0]_midout[16]
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+ chanx[1][0]_midout[17]
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+ chanx[1][0]_midout[18]
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+ chanx[1][0]_midout[19]
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+ chanx[1][0]_midout[20]
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+ chanx[1][0]_midout[21]
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+ chanx[1][0]_midout[22]
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+ chanx[1][0]_midout[23]
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+ chanx[1][0]_midout[24]
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+ chanx[1][0]_midout[25]
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+ chanx[1][0]_midout[26]
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+ chanx[1][0]_midout[27]
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+ chanx[1][0]_midout[28]
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+ chanx[1][0]_midout[29]
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+ grid[1][1]_pin[0][2][2]
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+ grid[1][0]_pin[0][0][0]
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+ grid[1][0]_pin[0][0][2]
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+ grid[1][0]_pin[0][0][4]
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+ grid[1][0]_pin[0][0][6]
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+ grid[1][0]_pin[0][0][8]
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+ grid[1][0]_pin[0][0][10]
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+ grid[1][0]_pin[0][0][12]
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+ grid[1][0]_pin[0][0][14]
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+ svdd sgnd
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Xmux_2level_tapbuf_size4[0] chanx[1][0]_midout[6] chanx[1][0]_midout[7] chanx[1][0]_midout[22] chanx[1][0]_midout[23] grid[1][1]_pin[0][2][2] sram[217]->outb sram[217]->out sram[218]->out sram[218]->outb sram[219]->outb sram[219]->out sram[220]->out sram[220]->outb svdd sgnd mux_2level_tapbuf_size4
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***** SRAM bits for MUX[0], level=2, select_path_id=0. *****
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*****1010*****
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Xsram[217] sram->in sram[217]->out sram[217]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[217]->out) 0
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.nodeset V(sram[217]->outb) vsp
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Xsram[218] sram->in sram[218]->out sram[218]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[218]->out) 0
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.nodeset V(sram[218]->outb) vsp
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Xsram[219] sram->in sram[219]->out sram[219]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[219]->out) 0
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.nodeset V(sram[219]->outb) vsp
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Xsram[220] sram->in sram[220]->out sram[220]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[220]->out) 0
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.nodeset V(sram[220]->outb) vsp
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Xmux_2level_tapbuf_size4[1] chanx[1][0]_midout[0] chanx[1][0]_midout[1] chanx[1][0]_midout[14] chanx[1][0]_midout[15] grid[1][0]_pin[0][0][0] sram[221]->outb sram[221]->out sram[222]->out sram[222]->outb sram[223]->outb sram[223]->out sram[224]->out sram[224]->outb svdd sgnd mux_2level_tapbuf_size4
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***** SRAM bits for MUX[1], level=2, select_path_id=0. *****
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*****1010*****
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Xsram[221] sram->in sram[221]->out sram[221]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[221]->out) 0
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.nodeset V(sram[221]->outb) vsp
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Xsram[222] sram->in sram[222]->out sram[222]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[222]->out) 0
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.nodeset V(sram[222]->outb) vsp
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Xsram[223] sram->in sram[223]->out sram[223]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[223]->out) 0
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.nodeset V(sram[223]->outb) vsp
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Xsram[224] sram->in sram[224]->out sram[224]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[224]->out) 0
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.nodeset V(sram[224]->outb) vsp
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Xmux_2level_tapbuf_size4[2] chanx[1][0]_midout[0] chanx[1][0]_midout[1] chanx[1][0]_midout[16] chanx[1][0]_midout[17] grid[1][0]_pin[0][0][2] sram[225]->outb sram[225]->out sram[226]->out sram[226]->outb sram[227]->outb sram[227]->out sram[228]->out sram[228]->outb svdd sgnd mux_2level_tapbuf_size4
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***** SRAM bits for MUX[2], level=2, select_path_id=0. *****
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*****1010*****
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Xsram[225] sram->in sram[225]->out sram[225]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[225]->out) 0
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.nodeset V(sram[225]->outb) vsp
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Xsram[226] sram->in sram[226]->out sram[226]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[226]->out) 0
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.nodeset V(sram[226]->outb) vsp
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Xsram[227] sram->in sram[227]->out sram[227]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[227]->out) 0
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.nodeset V(sram[227]->outb) vsp
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Xsram[228] sram->in sram[228]->out sram[228]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[228]->out) 0
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.nodeset V(sram[228]->outb) vsp
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Xmux_2level_tapbuf_size4[3] chanx[1][0]_midout[2] chanx[1][0]_midout[3] chanx[1][0]_midout[18] chanx[1][0]_midout[19] grid[1][0]_pin[0][0][4] sram[229]->outb sram[229]->out sram[230]->out sram[230]->outb sram[231]->outb sram[231]->out sram[232]->out sram[232]->outb svdd sgnd mux_2level_tapbuf_size4
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***** SRAM bits for MUX[3], level=2, select_path_id=0. *****
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*****1010*****
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Xsram[229] sram->in sram[229]->out sram[229]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[229]->out) 0
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.nodeset V(sram[229]->outb) vsp
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Xsram[230] sram->in sram[230]->out sram[230]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[230]->out) 0
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.nodeset V(sram[230]->outb) vsp
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Xsram[231] sram->in sram[231]->out sram[231]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[231]->out) 0
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.nodeset V(sram[231]->outb) vsp
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Xsram[232] sram->in sram[232]->out sram[232]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[232]->out) 0
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.nodeset V(sram[232]->outb) vsp
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Xmux_2level_tapbuf_size4[4] chanx[1][0]_midout[4] chanx[1][0]_midout[5] chanx[1][0]_midout[20] chanx[1][0]_midout[21] grid[1][0]_pin[0][0][6] sram[233]->outb sram[233]->out sram[234]->out sram[234]->outb sram[235]->outb sram[235]->out sram[236]->out sram[236]->outb svdd sgnd mux_2level_tapbuf_size4
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***** SRAM bits for MUX[4], level=2, select_path_id=0. *****
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*****1010*****
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Xsram[233] sram->in sram[233]->out sram[233]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[233]->out) 0
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.nodeset V(sram[233]->outb) vsp
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Xsram[234] sram->in sram[234]->out sram[234]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[234]->out) 0
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.nodeset V(sram[234]->outb) vsp
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Xsram[235] sram->in sram[235]->out sram[235]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[235]->out) 0
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.nodeset V(sram[235]->outb) vsp
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Xsram[236] sram->in sram[236]->out sram[236]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[236]->out) 0
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.nodeset V(sram[236]->outb) vsp
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Xmux_2level_tapbuf_size4[5] chanx[1][0]_midout[6] chanx[1][0]_midout[7] chanx[1][0]_midout[22] chanx[1][0]_midout[23] grid[1][0]_pin[0][0][8] sram[237]->outb sram[237]->out sram[238]->out sram[238]->outb sram[239]->outb sram[239]->out sram[240]->out sram[240]->outb svdd sgnd mux_2level_tapbuf_size4
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***** SRAM bits for MUX[5], level=2, select_path_id=0. *****
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*****1010*****
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Xsram[237] sram->in sram[237]->out sram[237]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[237]->out) 0
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.nodeset V(sram[237]->outb) vsp
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Xsram[238] sram->in sram[238]->out sram[238]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[238]->out) 0
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.nodeset V(sram[238]->outb) vsp
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Xsram[239] sram->in sram[239]->out sram[239]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[239]->out) 0
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.nodeset V(sram[239]->outb) vsp
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Xsram[240] sram->in sram[240]->out sram[240]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[240]->out) 0
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.nodeset V(sram[240]->outb) vsp
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Xmux_2level_tapbuf_size4[6] chanx[1][0]_midout[8] chanx[1][0]_midout[9] chanx[1][0]_midout[24] chanx[1][0]_midout[25] grid[1][0]_pin[0][0][10] sram[241]->outb sram[241]->out sram[242]->out sram[242]->outb sram[243]->outb sram[243]->out sram[244]->out sram[244]->outb svdd sgnd mux_2level_tapbuf_size4
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***** SRAM bits for MUX[6], level=2, select_path_id=0. *****
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*****1010*****
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Xsram[241] sram->in sram[241]->out sram[241]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[241]->out) 0
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.nodeset V(sram[241]->outb) vsp
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Xsram[242] sram->in sram[242]->out sram[242]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[242]->out) 0
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.nodeset V(sram[242]->outb) vsp
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Xsram[243] sram->in sram[243]->out sram[243]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[243]->out) 0
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.nodeset V(sram[243]->outb) vsp
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Xsram[244] sram->in sram[244]->out sram[244]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[244]->out) 0
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.nodeset V(sram[244]->outb) vsp
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Xmux_2level_tapbuf_size4[7] chanx[1][0]_midout[10] chanx[1][0]_midout[11] chanx[1][0]_midout[26] chanx[1][0]_midout[27] grid[1][0]_pin[0][0][12] sram[245]->outb sram[245]->out sram[246]->out sram[246]->outb sram[247]->outb sram[247]->out sram[248]->out sram[248]->outb svdd sgnd mux_2level_tapbuf_size4
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***** SRAM bits for MUX[7], level=2, select_path_id=0. *****
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*****1010*****
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Xsram[245] sram->in sram[245]->out sram[245]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[245]->out) 0
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.nodeset V(sram[245]->outb) vsp
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Xsram[246] sram->in sram[246]->out sram[246]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[246]->out) 0
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.nodeset V(sram[246]->outb) vsp
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Xsram[247] sram->in sram[247]->out sram[247]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[247]->out) 0
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.nodeset V(sram[247]->outb) vsp
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Xsram[248] sram->in sram[248]->out sram[248]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[248]->out) 0
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.nodeset V(sram[248]->outb) vsp
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Xmux_2level_tapbuf_size4[8] chanx[1][0]_midout[12] chanx[1][0]_midout[13] chanx[1][0]_midout[28] chanx[1][0]_midout[29] grid[1][0]_pin[0][0][14] sram[249]->outb sram[249]->out sram[250]->out sram[250]->outb sram[251]->outb sram[251]->out sram[252]->out sram[252]->outb svdd sgnd mux_2level_tapbuf_size4
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***** SRAM bits for MUX[8], level=2, select_path_id=0. *****
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*****1010*****
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Xsram[249] sram->in sram[249]->out sram[249]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[249]->out) 0
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.nodeset V(sram[249]->outb) vsp
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Xsram[250] sram->in sram[250]->out sram[250]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[250]->out) 0
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.nodeset V(sram[250]->outb) vsp
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Xsram[251] sram->in sram[251]->out sram[251]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[251]->out) 0
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.nodeset V(sram[251]->outb) vsp
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Xsram[252] sram->in sram[252]->out sram[252]->outb gvdd_sram_cbs sgnd sram6T
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.nodeset V(sram[252]->out) 0
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.nodeset V(sram[252]->outb) vsp
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.eom
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