riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
OpenFPGA/openfpga_flow/benchmarks/micro_benchmark/and2/and2_verific.blif

8 lines
122 B
Plaintext
Raw Blame History

# Benchmark "and2" written by ABC on Wed Oct 27 18:22:37 2021
.model and2
.inputs a b
.outputs c
.names a b c
11 1
.end
Reference in New Issue View Git Blame Copy Permalink