114 lines
4.0 KiB
Verilog
114 lines
4.0 KiB
Verilog
/////////////////////////////////////////////////////////////////////
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//// ////
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//// SBOX ////
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//// The SBOX is essentially a 64x4 ROM ////
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//// ////
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//// Author: Rudolf Usselmann ////
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//// rudi@asics.ws ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2001 Rudolf Usselmann ////
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//// rudi@asics.ws ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
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//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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module sbox1(addr, dout);
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input [1:6] addr;
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output [1:4] dout;
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reg [1:4] dout;
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always @(addr) begin
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case ({addr[1], addr[6], addr[2:5]}) //synopsys full_case parallel_case
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0: dout = 14;
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1: dout = 4;
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2: dout = 13;
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3: dout = 1;
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4: dout = 2;
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5: dout = 15;
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6: dout = 11;
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7: dout = 8;
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8: dout = 3;
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9: dout = 10;
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10: dout = 6;
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11: dout = 12;
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12: dout = 5;
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13: dout = 9;
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14: dout = 0;
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15: dout = 7;
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16: dout = 0;
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17: dout = 15;
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18: dout = 7;
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19: dout = 4;
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20: dout = 14;
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21: dout = 2;
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22: dout = 13;
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23: dout = 1;
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24: dout = 10;
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25: dout = 6;
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26: dout = 12;
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27: dout = 11;
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28: dout = 9;
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29: dout = 5;
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30: dout = 3;
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31: dout = 8;
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32: dout = 4;
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33: dout = 1;
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34: dout = 14;
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35: dout = 8;
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36: dout = 13;
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37: dout = 6;
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38: dout = 2;
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39: dout = 11;
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40: dout = 15;
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41: dout = 12;
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42: dout = 9;
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43: dout = 7;
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44: dout = 3;
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45: dout = 10;
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46: dout = 5;
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47: dout = 0;
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48: dout = 15;
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49: dout = 12;
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50: dout = 8;
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51: dout = 2;
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52: dout = 4;
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53: dout = 9;
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54: dout = 1;
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55: dout = 7;
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56: dout = 5;
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57: dout = 11;
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58: dout = 3;
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59: dout = 14;
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60: dout = 10;
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61: dout = 0;
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62: dout = 6;
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63: dout = 13;
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endcase
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end
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endmodule
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