OpenFPGA/openfpga_flow
tangxifan 18d2a8ce19 [Flow] Add new script for fixed device layout using global tile clock 2021-01-10 11:08:02 -07:00
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arch_bitstreams [Architecture] Update external bitstream 2020-09-25 21:30:59 -06:00
benchmarks [Benchmark] Bug fix in pipelined and2 benchmark 2021-01-10 10:27:59 -07:00
docs Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00
fabric_keys [Architecture] Add example fabric key using multiple regions 2020-09-29 14:14:50 -06:00
misc Updating variable name in ys to call BLIF output file. 2020-12-18 03:18:46 -08:00
openfpga_arch [Arch] Bug fix 2021-01-10 11:05:57 -07:00
openfpga_cell_library [HDL] Update dff netlist for SCFF used in configuration chain 2021-01-04 17:17:35 -07:00
openfpga_shell_scripts [Flow] Add new script for fixed device layout using global tile clock 2021-01-10 11:08:02 -07:00
openfpga_simulation_settings add example simulation setting for openfpga flow 2020-06-11 19:31:15 -06:00
scripts [Bugfix] Honors yosys_tmpl parameter in flow script 2020-12-03 12:24:24 -07:00
tasks [Test] Add new test case for registerable I/O architecture 2021-01-10 11:00:21 -07:00
tech Added Power Model Files 2019-08-19 18:55:23 -06:00
vpr_arch [Arch] Bug fix 2021-01-10 11:05:57 -07:00
.gitignore Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00