OpenFPGA/openfpga
tangxifan 18d12109fb [core] fixed a critical bug where cb port name using index is not considered on clock network entry 2024-07-16 17:42:21 -07:00
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src [core] fixed a critical bug where cb port name using index is not considered on clock network entry 2024-07-16 17:42:21 -07:00
CMakeLists.txt [lib] rename lib to namemanager as a unified library to provide naming support on FPGA modules 2023-09-15 13:51:14 -07:00