OpenFPGA/vpr/src
tangxifan 7a7f8374b3 start deploying edge sorting in uniquifying SB modules 2020-03-08 15:24:34 -06:00
..
analysis add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
base start debugging tileable rr_graph generator 2020-03-06 17:02:22 -07:00
device adapt top function of tileable rr_graph builder 2020-03-06 15:24:26 -07:00
draw correct missing rr_nodes usage to rr_graph obj 2020-02-04 16:48:15 -07:00
pack fix dependency error in pack_types header file 2020-02-18 11:36:16 -07:00
place bug fixing for heterogenenous FPGA when using the RRGraph object 2020-02-04 17:31:39 -07:00
power power estimation adapted to use RRGraph object 2020-02-01 12:26:42 -07:00
route start debugging tileable rr_graph generator 2020-03-06 17:02:22 -07:00
tileable_rr_graph start deploying edge sorting in uniquifying SB modules 2020-03-08 15:24:34 -06:00
timing net delay adopt RRGraph object, compile with no errors 2020-02-01 22:38:21 -07:00
util correct missing rr_nodes usage to rr_graph obj 2020-02-04 16:48:15 -07:00
main.cpp add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00