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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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089cc5e86e
OpenFPGA
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fpga_flow
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benchmarks
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Verilog
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MCNC
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seq
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AurelienUoU
df8bb0db1a
Add MCNC Benchmarks netlists generation to travis regression test
2019-05-17 15:22:04 -06:00
..
seq.v
Add MCNC Benchmarks netlists generation to travis regression test
2019-05-17 15:22:04 -06:00