150 lines
6.3 KiB
C++
150 lines
6.3 KiB
C++
/********************************************************************
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* This file includes functions that outputs routing circuit definition
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* to XML format
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*******************************************************************/
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/* Headers from system goes first */
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#include <string>
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#include <algorithm>
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/* Headers from vtr util library */
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#include "vtr_assert.h"
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#include "vtr_log.h"
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#include "openfpga_digest.h"
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/* Headers from readarchopenfpga library */
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#include "write_xml_utils.h"
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#include "write_xml_routing_circuit.h"
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/********************************************************************
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* Write switch circuit model definition in XML format
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*******************************************************************/
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static
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void write_xml_routing_component_circuit(std::fstream& fp,
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const char* fname,
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const std::string& routing_component_name,
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const CircuitLibrary& circuit_lib,
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const std::map<std::string, CircuitModelId>& switch2circuit) {
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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/* Iterate over the mapping */
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for (std::map<std::string, CircuitModelId>::const_iterator it = switch2circuit.begin();
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it != switch2circuit.end();
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++it) {
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fp << "\t\t" << "<" << routing_component_name;
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write_xml_attribute(fp, "name", it->first.c_str());
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write_xml_attribute(fp, "circuit_model_name", circuit_lib.model_name(it->second).c_str());
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fp << "/>" << "\n";
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}
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}
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/********************************************************************
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* Write switch circuit model definition in XML format
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*******************************************************************/
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static
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void write_xml_direct_component_circuit(std::fstream& fp,
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const char* fname,
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const std::string& direct_tag_name,
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const CircuitLibrary& circuit_lib,
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const ArchDirect& arch_direct,
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const ArchDirectId& direct_id) {
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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/* Iterate over the mapping */
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fp << "\t\t" << "<" << direct_tag_name;
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write_xml_attribute(fp, "name", arch_direct.name(direct_id).c_str());
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write_xml_attribute(fp, "circuit_model_name", circuit_lib.model_name(arch_direct.circuit_model(direct_id)).c_str());
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write_xml_attribute(fp, "type", DIRECT_TYPE_STRING[arch_direct.type(direct_id)]);
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write_xml_attribute(fp, "x_dir", DIRECT_DIRECTION_STRING[arch_direct.x_dir(direct_id)]);
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write_xml_attribute(fp, "y_dir", DIRECT_DIRECTION_STRING[arch_direct.y_dir(direct_id)]);
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fp << "/>" << "\n";
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}
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/********************************************************************
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* Write Connection block circuit models in XML format
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*******************************************************************/
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void write_xml_cb_switch_circuit(std::fstream& fp,
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const char* fname,
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const CircuitLibrary& circuit_lib,
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const std::map<std::string, CircuitModelId>& switch2circuit) {
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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/* Write the root node */
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fp << "\t" << "<connection_block>" << "\n";
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/* Write each switch circuit definition */
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write_xml_routing_component_circuit(fp, fname, std::string("switch"), circuit_lib, switch2circuit);
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/* Finish writing the root node */
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fp << "\t" << "</connection_block>" << "\n";
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}
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/********************************************************************
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* Write Switch block circuit models in XML format
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*******************************************************************/
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void write_xml_sb_switch_circuit(std::fstream& fp,
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const char* fname,
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const CircuitLibrary& circuit_lib,
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const std::map<std::string, CircuitModelId>& switch2circuit) {
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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/* Write the root node */
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fp << "\t" << "<switch_block>" << "\n";
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/* Write each switch circuit definition */
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write_xml_routing_component_circuit(fp, fname, std::string("switch"), circuit_lib, switch2circuit);
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/* Finish writing the root node */
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fp << "\t" << "</switch_block>" << "\n";
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}
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/********************************************************************
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* Write routing segment circuit models in XML format
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*******************************************************************/
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void write_xml_routing_segment_circuit(std::fstream& fp,
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const char* fname,
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const CircuitLibrary& circuit_lib,
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const std::map<std::string, CircuitModelId>& seg2circuit) {
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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/* Write the root node */
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fp << "\t" << "<routing_segment>" << "\n";
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/* Write each routing segment circuit definition */
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write_xml_routing_component_circuit(fp, fname, std::string("segment"), circuit_lib, seg2circuit);
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/* Finish writing the root node */
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fp << "\t" << "</routing_segment>" << "\n";
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}
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/********************************************************************
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* Write direction connection circuit models in XML format
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*******************************************************************/
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void write_xml_direct_circuit(std::fstream& fp,
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const char* fname,
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const CircuitLibrary& circuit_lib,
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const ArchDirect& arch_direct) {
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/* If the direct2circuit is empty, we do not output XML */
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if (0 == arch_direct.directs().size()) {
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return;
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}
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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/* Write the root node */
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fp << "\t" << "<direct_connection>" << "\n";
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/* Write each direct connection circuit definition */
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for (const ArchDirectId& direct_id : arch_direct.directs()) {
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write_xml_direct_component_circuit(fp, fname, std::string("direct"), circuit_lib, arch_direct, direct_id);
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}
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/* Finish writing the root node */
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fp << "\t" << "</direct_connection>" << "\n";
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}
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