OpenFPGA/openfpga_flow/tasks/quicklogic_tests/counter_5clock_test/config
Lalit Sharma 1082d3c677 Renaming file qlf_k4n8_yosys.ys to qlf_yosys.ys 2021-02-25 23:39:07 -08:00
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pin_constraints.xml [Test] Bug fix in the 5clock test case 2021-02-22 11:46:23 -07:00
repack_pin_constraints.xml [Test] Bug fix in the 5clock test case 2021-02-22 11:46:23 -07:00
task.conf Renaming file qlf_k4n8_yosys.ys to qlf_yosys.ys 2021-02-25 23:39:07 -08:00