OpenFPGA/libs/librtlnumber
tangxifan f1bafffa87 add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
..
regression_tests add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
src add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
unit_test add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
.gitignore add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
CMakeLists.txt add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
Makefile add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
README.md add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
main.cpp add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00
verify_librtlnumber.sh add vpr8 libs and core engine for further integration 2020-01-03 16:14:42 -07:00

README.md

librtlnumber - Register Transfer Level (RTL) Verilog Number Library

Authors: Aaron Graham (aaron.graham@unb.ca, aarongraham9@gmail.com), Jean-Philippe Legault (jlegault@unb.ca, jeanphilippe.legault@gmail.com) and Dr. Kenneth B. Kent (ken@unb.ca) for the Reconfigurable Computing Research Lab at the Univerity of New Brunswick in Fredericton, New Brunswick, Canada

Arbitrary Length Verilog Number Library that can Handle X and Z inputs.