language: cpp

# cache results

cache:
  directories:
    - $TRAVIS_BUILD_DIR/abc
    - $TRAVIS_BUILD_DIR/yosys
    - $TRAVIS_BUILD_DIR/ace2
#    - $TRAVIS_BUILD_DIR/libs
    - $HOME/.ccache
#    - $HOME/deps

# Currently sudo is not required, NO ENV is used

# Supported Operating systems
dist: bionic
compiler: g++-8
addons:
  apt:
    sources:
    - ubuntu-toolchain-r-test # For newer GCC
    - llvm_toolchain-trusty-7
    packages:
    - autoconf
    - automake
    - bash
    - bison
    - build-essential
    - cmake
    - ctags
    - curl
    - doxygen
    - flex
    - fontconfig
    - g++-8
    - gcc-8
    - gdb
    - git
    - gperf
    - iverilog
    - libcairo2-dev
    - libevent-dev
    - libfontconfig1-dev
    - liblist-moreutils-perl
    - libncurses5-dev
    - libx11-dev
    - libxft-dev
    - libxml++2.6-dev
    - perl
    - python
    - python-lxml
    - texinfo
    - time
    - valgrind
    - zip
    - qt5-default
    - clang-format-7
#- os: osx
#  osx_image: xcode10.2 # we target latest MacOS Mojave
#  sudo: true
#  compiler: gcc-4.9 # Use clang instead of gcc in MacOS
#  addons:
#    homebrew:
#      packages:
#      - bison
#      - cmake
#      - ctags
#      - flex
#      - fontconfig
#      - git
#      - gcc@6
#      - gcc@4.9
#      - gawk
#      - icarus-verilog
#      - libxml++
#      - qt5

before_script:
  - source .travis/common.sh
  - source .travis/install.sh

stages:
  - name: Test
    if: type != cron

jobs:
  include:
    - stage: Test
      name: "Basic regression tests"
      script:
        - source .travis/build.sh
        - source .travis/basic_reg_test.sh

    - stage: Test
      name: "FPGA-Verilog regression tests"
      script:
        - source .travis/build.sh
        - source .travis/fpga_verilog_reg_test.sh

    - stage: Test
      name: "FPGA-Bitstream regression tests"
      script:
        - source .travis/build.sh
        - source .travis/fpga_bitstream_reg_test.sh

    - stage: Test
      name: "FPGA-SDC regression tests"
      script:
        - source .travis/build.sh
        - source .travis/fpga_sdc_reg_test.sh

    - stage: Test
      name: "FPGA-SPICE regression tests"
      script:
        - source .travis/build.sh
        - source .travis/fpga_spice_reg_test.sh

#after_failure:
#  - .travis/after_failure.sh

#after_success:
#  - .travis/after_success.sh

script:
  - true

notifications:
  slack:
    secure: L8tzicFh+EKcK21GBA2m3rQ3jmnDdqiRXIZcb0iqYlhT0V5asYvCqwlpPDUDV1wmBXqPgRJBI/jitAJlKFWu74pLTVc6FscUIDYM7S0DJfHEcufLknZx88lMmmV0IsYLQe3/s89tWoudMf1bNBo/8YWzLDffqUQ7s/rTPD9SWLppb01X0Xm158oDlA0rWETs35nuNFgJxWcSyIyIvnRNE3dHjzmBETUR9mYDsUSYlcOI44FMD8rE6emicdkqdn1zVxScobrl4Dt2bPsMfKopgIKK1x+38AuaqQa7t5F5ICnF0WfxmQ6/TcRNwIij0fDu68w/fcU8SyV+Ex5aZBKYUU7PG7ELTOq+q1geDoTlbguvFSIT4EzqErc4hbJmcUn79BKLhdjshZtGihKatntJx2faXYNYGFjwmnPFRYpqsozydztgMjzv4prZ5yoh7jhoDiGj44QcpXlQ9otM17JdfqveowMLHBYzATsxIRG93irZfXG/E3S8FvXg8mYOIEn8UK7H6i8VWL3JHlw8RbpLdNLswZOUlpEaDAeTm5tvYcw7FGH2nlZ2e5aXLxN6dTovSSRztQHbWdJTGG0N+xldBXcCiChmok4nXGReIkMc+99nZjRsiCB0R16tCNb25/p7NAVkItfVe1qRTzdnhi1hdE7LPURK4kxoFRJ6sFVuYjw=