.. _addon_vpr_syntax: Additional Syntax to Original VPR XML ------------------------------------- .. warning:: Note this is only applicable to VPR8! Each ```` should contain a ```` that describe the physical implementation of the ````. Note that this is fully compatible to the VPR architecture XML syntax. ```` should include the models that describe the primitive ```` in physical mode. ```` may include additioinal syntax to enable tileable routing resource graph generation .. option:: tileable="" Turn on/off tileable routing resource graph generator ```` may include addition syntax to enable different connectivity for pass tracks .. option:: sub_type="" Connecting type for pass tracks in each switch block If not specified, the pass tracks will the same connecting patterns as start/end tracks, which are defined in ``type`` .. option:: sub_Fs="" Connectivity parameter for pass tracks in each switch block. Must be a multiple of 3. If not specified, the pass tracks will the same connectivity as start/end tracks, which are defined in ``fs`` .. note:: Currently, OpenFPGA only supports uni-directional routing architectures .. note:: Currently, OpenFPGA only supports 1 ```` to be defined under each ```` .. note:: OpenFPGA require explicit names to be defined for each routing segement in ````