///////////////////////////////////////////////////////////////////// //// //// //// WISHBONE rev.B2 compliant enhanced VGA/LCD Core //// //// Defines file //// //// //// //// Author: Richard Herveille //// //// richard@asics.ws //// //// www.asics.ws //// //// //// //// Downloaded from: http://www.opencores.org/projects/vga_lcd //// //// //// ///////////////////////////////////////////////////////////////////// //// //// //// Copyright (C) 2001, 2002 Richard Herveille //// //// richard@asics.ws //// //// //// //// This source file may be used and distributed without //// //// restriction provided that this copyright statement is not //// //// removed from the file and that any derivative work contains //// //// the original copyright notice and the associated disclaimer.//// //// //// //// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY //// //// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED //// //// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS //// //// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR //// //// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, //// //// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES //// //// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE //// //// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR //// //// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF //// //// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT //// //// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT //// //// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE //// //// POSSIBILITY OF SUCH DAMAGE. //// //// //// ///////////////////////////////////////////////////////////////////// // CVS Log // // $Id: vga_defines.v,v 1.6 2003/08/01 11:46:38 rherveille Exp $ // // $Date: 2003/08/01 11:46:38 $ // $Revision: 1.6 $ // $Author: rherveille $ // $Locker: $ // $State: Exp $ // // Change History: // $Log: vga_defines.v,v $ // Revision 1.6 2003/08/01 11:46:38 rherveille // 1) Rewrote vga_fifo_dc. It now uses gray codes and a more elaborate anti-metastability scheme. // 2) Changed top level and pixel generator to reflect changes in the fifo. // 3) Changed a bug in vga_fifo. // 4) Changed pixel generator and wishbone master to reflect changes. // // Revision 1.5 2003/05/07 09:48:54 rherveille // Fixed some Wishbone RevB.3 related bugs. // Changed layout of the core. Blocks are located more logically now. // Started work on a dual clocked/double edge 12bit output. Commonly used by external devices like DVI transmitters. // // Revision 1.4 2002/02/07 05:42:10 rherveille // Fixed some bugs discovered by modified testbench // Removed / Changed some strange logic constructions // Started work on hardware cursor support (not finished yet) // Changed top-level name to vga_enh_top.v // //////////////////////// // // Global settings // // // define memory vendor // for FPGA implementations use `define VENDOR_FPGA `define VENDOR_FPGA // // enable / disable 12bit DVI output // (for use with external DVI transmitters) //`define VGA_12BIT_DVI //////////////////////// // // Hardware Cursors // // // enable / disable hardware cursors // //`define VGA_HWC0 //`define VGA_HWC1 // // enable / disabled 3D support for hardware cursors // //`define VGA_HWC_3D