# Yosys synthesis script for ${TOP_MODULE} ######################### # Parse input files ######################### # Read verilog files read_verilog ${READ_VERILOG_OPTIONS} ${VERILOG_FILES} # Read technology library read_verilog -lib -specify ${YOSYS_CELL_SIM_VERILOG} ######################### # Prepare for synthesis ######################### # Identify top module from hierarchy hierarchy -check -top ${TOP_MODULE} # - Convert process blocks to AST proc # Flatten all the gates/primitives flatten # Identify tri-state buffers from 'z' signal in AST # with follow-up optimizations to clean up AST tribuf -logic opt_expr opt_clean # demote inout ports to input or output port # with follow-up optimizations to clean up AST deminout opt -nodffe -nosdff opt_expr opt_clean check opt -nodffe -nosdff wreduce -keepdc peepopt pmuxtree opt_clean ######################## # Map multipliers # Inspired from synth_xilinx.cc ######################### # Avoid merging any registers into DSP, reserve memory port registers first memory_dff wreduce t:$mul techmap -map +/mul2dsp.v -map ${YOSYS_DSP_MAP_VERILOG} ${YOSYS_DSP_MAP_PARAMETERS} select a:mul2dsp setattr -unset mul2dsp opt_expr -fine wreduce select -clear chtype -set $mul t:$__soft_mul# Extract arithmetic functions ######################### # Run coarse synthesis ######################### # Run a tech map with default library techmap alumacc share opt -nodffe -nosdff fsm # Run a quick follow-up optimization to sweep out unused nets/signals opt -fast -nodffe -nosdff # Optimize any memory cells by merging share-able ports and collecting all the ports belonging to memorcy cells memory -nomap opt_clean ######################### # Map flip-flops ######################### dfflegalize -cell $_DFF_P_ 0 techmap -map +/adff2dff.v opt_expr -mux_undef simplemap opt_expr opt_merge opt_dff -nodffe -nosdff opt_clean opt -nodffe -nosdff ######################### # Map LUTs ######################### abc -lut ${LUT_SIZE} ######################### # Check and show statisitics ######################### hierarchy -check stat ######################### # Output netlists ######################### opt_clean -purge write_blif ${OUTPUT_BLIF}