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*     FPGA SPICE Netlist    *
* Description: Header file *
*    Author: Xifan TANG     *
* Organization: EPFL/IC/LSI *
* Date: Thu Nov 15 14:26:04 2018
 *
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.include './spice_test_example_1/subckt/cby_1_1.sp'
.include './spice_test_example_1/subckt/cby_0_1.sp'
.include './spice_test_example_1/subckt/cbx_1_1.sp'
.include './spice_test_example_1/subckt/cbx_1_0.sp'
.include './spice_test_example_1/subckt/sb_1_1.sp'
.include './spice_test_example_1/subckt/sb_1_0.sp'
.include './spice_test_example_1/subckt/sb_0_1.sp'
.include './spice_test_example_1/subckt/sb_0_0.sp'
.include './spice_test_example_1/subckt/chany_1_1.sp'
.include './spice_test_example_1/subckt/chany_0_1.sp'
.include './spice_test_example_1/subckt/chanx_1_1.sp'
.include './spice_test_example_1/subckt/chanx_1_0.sp'