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Final1.1

v0.1-alpha

v0.2-alpha

v0.3-alpha

v1.1.0

v1.1.525

v1.1.541

v1.2.0

Mono Color

• 9538dbd644 Config script written and changed some rights for some files Baudouin Chauviere 2018-10-24 15:59:32 -0600
• 4a950c6857 Flatten_hierarchy_doc Aurelien Alacchi 2018-10-18 16:28:12 -0600
• aa5449c37d Verif_modif_doc_title_2 Aurelien Alacchi 2018-10-17 16:49:55 -0600
• 6327a4486b Revert "Verif_modif_doc_title" Aurelien Alacchi 2018-10-17 16:47:32 -0600
• 8f7f88ebea Verif_modif_doc_title Aurelien Alacchi 2018-10-17 16:45:42 -0600
• 2cfbe2b997 FPGA-Verilog_doc_update Aurelien Alacchi 2018-10-17 16:38:03 -0600
• e96c6e2f02 Revert "Bug_correction_fpga-spice_commandLine" Aurelien Alacchi 2018-10-12 16:09:14 -0600
• 33e76d0255 Bug_correction_fpga-spice_commandLine Aurelien Alacchi 2018-10-12 16:05:53 -0600
• 26538cb2bc Correction_file_commandline_fpga-spice Aurelien Alacchi 2018-10-12 16:03:23 -0600
• e0c2fc2c8a Documentation_code&example_update Aurelien Alacchi 2018-10-12 15:50:09 -0600
• 07380ed1fa Minor_bug_fig_name_correction Aurelien Alacchi 2018-10-09 15:33:30 -0600
• 201c0797b2 Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA Aurelien Alacchi 2018-10-09 15:29:18 -0600
• a43574e593 Update_doc_circuit_level_fig_fixed Aurelien Alacchi 2018-10-09 15:29:15 -0600
• c051b109c6 Revert "Correction" Baudouin Chauviere 2018-10-09 15:12:36 -0600
• 5734b56502 Correction Baudouin Chauviere 2018-10-09 15:10:07 -0600
• bee23b6cb1 Images resized Baudouin Chauviere 2018-10-09 15:08:50 -0600
• b4d2f6c723 Test image resizing Baudouin Chauviere 2018-10-09 15:07:23 -0600
• c36598e7a4 Revert "Trying to resize images" Baudouin Chauviere 2018-10-09 15:02:33 -0600
• 98ea09d6af Trying to resize images Baudouin Chauviere 2018-10-09 15:02:19 -0600
• 54df294c8d Revert "Trying to resize the images in XML" Baudouin Chauviere 2018-10-09 14:59:05 -0600
• a52ef95ef0 Trying to resize the images in XML Baudouin Chauviere 2018-10-09 14:58:47 -0600
• 1e04436cbb Corrections of some syntax errors Baudouin Chauviere 2018-10-09 14:46:43 -0600
• 8565e4e376 Addition of the second example and a ReadME to understand them. Baudouin Chauviere 2018-10-09 14:42:15 -0600
• d1c01cd68b Update_bug_fig_doc_CL Aurelien Alacchi 2018-10-08 17:54:44 -0600
• 7c51129a33 test42docFig Aurelien Alacchi 2018-10-08 16:20:34 -0600
• 8723722e99 test_correction_bug_fig_doc_CL Aurelien Alacchi 2018-10-08 16:18:56 -0600
• ebd4b282f5 test_correction_figure Aurelien Alacchi 2018-10-08 16:00:21 -0600
• a318f8e20e Update_doc_circuit_level_bug_image Aurelien Alacchi 2018-10-08 15:48:54 -0600
• f79913f379 Update_doc_circuit_level_bug_image Aurelien Alacchi 2018-10-08 15:42:19 -0600
• 44bdca0429 Revert "figure_correction_doc_circuit_level" Aurelien Alacchi 2018-10-08 15:30:47 -0600
• 054a2bb186 Revert "bug_correction_fig_circuit_level" Aurelien Alacchi 2018-10-08 15:30:36 -0600
• c6cd63462c bug_correction_fig_circuit_level Aurelien Alacchi 2018-10-08 15:30:03 -0600
• 046829bd13 figure_correction_doc_circuit_level Aurelien Alacchi 2018-10-08 15:27:30 -0600
• cf1dddff5f Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA Aurelien Alacchi 2018-10-08 15:19:48 -0600
• cf804b8fb2 Define Circuit Level update Aurelien Alacchi 2018-10-08 15:15:44 -0600
• 05f70548f3
  Add files via upload LNIS-Projects 2018-10-08 15:02:16 -0600
• e5c6471fc2 Update of the Readme and added an example Baudouin Chauviere 2018-10-03 17:10:29 -0600
• d89b03abbb keep updating readme v0.1-alpha iccd-2015 tangxifan 2018-10-01 17:06:54 -0600
• 95c16877f1 Modify readme tangxifan 2018-10-01 17:05:51 -0600
• b3c021520d add manuals tangxifan 2018-10-01 17:03:50 -0600
• 3751784ddd init commit for iccd-2015 tangxifan 2018-10-01 16:58:16 -0600
• d191c7a436 Init iccd2015 branch tangxifan 2018-10-01 16:54:12 -0600
• 936c13c3b5 Compilation OS added Baudouin Chauviere 2018-09-28 17:51:49 -0600
• 328d201855 Correction Baudouin Chauviere 2018-09-28 15:47:04 -0600
• 6a07780687 Revert "Correction" Baudouin Chauviere 2018-09-28 15:46:31 -0600
• 8aa7341859 Correction Baudouin Chauviere 2018-09-28 15:45:53 -0600
• df156c5d7d Implementation of Ubuntu compilation Baudouin Chauviere 2018-09-28 15:44:37 -0600
• 535f554fce Revert "Implementation of the Ubuntu compilation" Baudouin Chauviere 2018-09-28 15:40:19 -0600
• 8e793c6542 Implementation of the Ubuntu compilation Baudouin Chauviere 2018-09-28 15:39:43 -0600
• 4a4f539365 Change rights script Baudouin Chauviere 2018-09-27 15:51:09 -0600
• 665678267d Change rights script Baudouin Chauviere 2018-09-27 15:17:48 -0600
• c67ba5f58a clean up codes tangxifan 2018-09-27 14:26:08 -0600
• 31c3eba111 ReadMe modifications to add the beginning of the FPGA-SPICE tutorial Baudouin Chauviere 2018-09-27 09:33:39 -0600
• 16c0c4656e Adds titles and WiP tags for new parts. Tutorials included Baudouin Chauviere 2018-09-25 14:53:04 -0600
• 70d303dfb5 Define Circuit doc improvement Baudouin Chauviere 2018-09-25 11:53:53 -0600
• 681cca99a4 fix a bug in tapbuf tangxifan 2018-09-21 19:00:22 -0600
• d683134b12 rename customized vpr7 to vpr7 XML to Production tangxifan 2018-09-17 23:10:45 -0600
• 6461279a80 fixing minor bugs tangxifan 2018-09-17 11:25:54 -0600
• f47246e8b7 Fixed doc ref problem tangxifan 2018-09-14 14:02:47 -0600
• 087ba475bb debugging bibtex tangxifan 2018-09-14 13:58:20 -0600
• 965835debe debugging doc ref tangxifan 2018-09-14 13:48:57 -0600
• 4afbce10a3 fixing bugs for doc references tangxifan 2018-09-14 13:44:40 -0600
• 5d697da4e7 refine doc hierarchy tangxifan 2018-09-14 13:27:05 -0600
• c7783575d9 Clean codes Xifan Tang 2018-09-14 13:16:26 -0600
• 0bfbc9b0aa update docs 唐希凡 2018-09-14 13:11:51 -0600
• 44e63ec98b Test new template Xifan Tang 2018-09-13 23:00:56 -0600
• fec0daa2a8 Update a draft Xifan Tang 2018-09-13 22:58:54 -0600
• 0f31d51c1a update doc html template 唐希凡 2018-09-13 17:59:53 -0600
• 655baa3cd9 Debugged Doc 唐希凡 2018-09-13 17:39:57 -0600
• cea41801da updating documentation Xifan Tang 2018-09-13 16:25:24 -0600
• c94cc01c83 debugging documentation Xifan Tang 2018-09-13 15:52:08 -0600
• 7261a53f3c update docs theme Xifan Tang 2018-09-13 15:48:10 -0600
• d6d6951496 Adding documentation Xifan Tang 2018-09-13 15:38:41 -0600
• d7e2a78d86 creating documentation Xifan Tang 2018-09-13 11:52:12 -0600
• bdffcbd559 creating documentations Xifan Tang 2018-09-13 11:51:32 -0600
• 1cf066d3ad Fixing minor bugs Xifan Tang 2018-09-06 14:25:23 -0600
• c009a37580 fix minor bugs Xifan Tang 2018-09-04 17:56:37 -0600
• 42da9160f0 Clean codes and update Xifan Tang 2018-09-04 17:49:20 -0600
• 9f3cb45b85 Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA Xifan Tang 2018-09-04 17:33:38 -0600
• 00ecd0bb1d Cleanup codes and organization Xifan Tang 2018-09-04 17:31:30 -0600
• d3d95ee842
  Update getting_started.md tangxifan 2018-08-10 14:17:12 -0600
• cb15bb5082 Clean code and fix minor bugs Xifan Tang 2018-08-10 13:46:00 -0600
• b0ef554b35 Add power property XML Xifan Tang 2018-08-09 11:27:36 -0600
• 90669d19c5 Update FPGA-SPICE and flow configurations Xifan Tang 2018-08-09 11:27:16 -0600
• 4d7f4350de get FPGA-SPICE updated for release - Clear printf and fix assert bugs Xifan Tang 2018-08-01 14:04:28 -0600
• 91f073cdc4 added build files to .gitignore Steve Corey 2018-07-30 10:36:34 -0600
• fe13168f8f Add ABC and ACE2, fix bugs for fpga_flow and VPR Xifan Tang 2018-07-27 22:54:52 -0600
• b9d583519b Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA Steve Corey 2018-07-26 13:59:26 -0600
• be6c296c22 initial commit of black-box doc Steve Corey 2018-07-26 13:58:58 -0600
• 158dec405e Reorganize the code directory Xifan Tang 2018-07-26 11:28:21 -0600
• 3abce69f7c multimode clb simple documentation complete Steve Corey 2018-07-18 10:54:05 -0600
• c61d11baa6 changed some names to make more sense Steve Corey 2018-07-18 10:53:21 -0600
• 9c4e5ca95f ignored vpr output files Steve Corey 2018-07-18 10:50:37 -0600
• 1b36d491c8 ignored vpr output files Steve Corey 2018-07-18 10:48:55 -0600
• 51efa38751 continuing simple documentation Steve Corey 2018-07-17 13:55:10 -0600
• 84fd0348af initial commit of simple architecture documentation Steve Corey 2018-07-16 13:22:18 -0600
• 6f73b7a874 moved architecture documentation to new file Steve Corey 2018-07-16 13:21:41 -0600
• 17988e2ade changed switch names to make more sense Steve Corey 2018-07-16 13:21:07 -0600
• fa50eef093 added simple architecture for vpr version 8 Steve Corey 2018-07-11 13:19:40 -0600
• 2208916a95 updated to line numbers of vpr8 example architecture Steve Corey 2018-07-10 13:02:21 -0600