chungshien-chai
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766df0a1b5
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Improve Port Parser
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2024-07-31 12:19:30 -07:00 |
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chungshien-chai
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0d9f1a3c6b
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Forward searching the config bit + some minor refactor
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2024-07-28 19:12:34 -07:00 |
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chungshien-chai
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2a3d69aded
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Update code based on feedback
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2024-07-28 02:37:15 -07:00 |
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chungshien-chai
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e60777d23e
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Use Bitstream Setting XML
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2024-07-26 01:36:49 -07:00 |
tangxifan
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93cbbf2045
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[core] code format
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2023-10-06 18:20:55 -07:00 |
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tangxifan
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b07111497c
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[core] enable options in xml writers
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2023-10-06 18:20:17 -07:00 |
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tangxifan
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95a32628ab
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[core] fixed the bug in arch bitgen due to the tile modules
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2023-07-25 14:15:15 -07:00 |
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tangxifan
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83fa6a421e
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[core] code format
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2023-06-26 10:06:17 -07:00 |
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tangxifan
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70f40cd21a
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[core] fixing bugs in the preconfig module when supporting dut module of fpga_core
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2023-06-26 10:03:19 -07:00 |
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tangxifan
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6d31b319a2
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[engine] update source files subject to code formatting rules
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2022-10-06 17:08:50 -07:00 |
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tangxifan
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83600d2bdd
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[script] add install target for lib CMakefile
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2022-08-24 19:47:01 -07:00 |
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tangxifan
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a52597361b
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[script] remove duplicated libraries in dependency list for some libopenfpga
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2022-08-18 11:34:01 -07:00 |
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tangxifan
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e909f4fabe
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[lib] rename libopenfpga to libs
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2022-08-18 10:27:20 -07:00 |